IP Library Granted Patent US 9,899,522
Granted Patent B1
US 9,899,522 · App. 15/401,092 · Granted Feb 20, 2018

Semiconductor device and method for fabricating the same

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Quick Facts
Patent No.
US 9,899,522
App. No.
15/401,092
Granted
Feb 20, 2018
Kind
B1
Abstract

A method for fabricating semiconductor device includes the steps of: forming a gate structure on a substrate; forming a first recess adjacent to two sides of the gate structure; forming an epitaxial layer in the first recess; removing part of the epitaxial layer to forma second recess; and forming an interlayer dielectric (ILD) layer on the gate structure and into the second recess.

Claims (15)

1. A semiconductor device, comprising:

a substrate;

a gate structure on the substrate;

a first recess adjacent to two sides of the gate structure;

an epitaxial layer in the first recess, wherein the epitaxial layer comprises a top surface extending along a first direction and a sidewall extending along a second direction; and

a contact etch stop layer (CESL) on the epitaxial layer and in the first recess and directly contacting the top surface and the sidewall of the epitaxial layer.

2. The semiconductor device of claim 1 , further comprising:

a second recess in the epitaxial layer; and

the CESL in the second recess.

3. The semiconductor device of claim 1 , wherein the CESL contacts the epitaxial layer in the first recess.

4. The semiconductor device of claim 1 , further comprising an interlayer dielectric (ILD) layer on the CESL.

5. The semiconductor device of claim 4 , further comprising a contact plug in the ILD layer and in the first recess.

6. The semiconductor device of claim 5 , wherein the contact plug contacts the CESL and the epitaxial layer in the first recess.

7. The semiconductor device of claim 5 , wherein the contact plug contacts the CESL above a top surface of the substrate and below the top surface of the substrate.

8. The semiconductor device of claim 1 , wherein the first direction is orthogonal to the second direction.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 26, 2021
From: UNITED MICROELECTRONICS CORPORATION
To: MARLIN SEMICONDUCTOR LIMITED
Reel/Frame 056991/0292 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 8, 2017
From: LIU, AN-CHI; LIN, CHUN-HSIEN
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 040886/0417 →