IP Library Granted Patent US 9,704,737
Granted Patent B2
US 9,704,737 · App. 14/816,081 · Granted Jul 11, 2017

Semiconductor device and method for fabricating the same

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Quick Facts
Patent No.
US 9,704,737
App. No.
14/816,081
Granted
Jul 11, 2017
Kind
B2
Abstract

A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a first region, a second region, and a third region; forming a plurality of spacers on the first region, the second region, and the third region; forming a first patterned mask to cover the spacers on the first region and the second region; and removing the spacers on the third region.

Claims (13)

1. A semiconductor device, comprising:

a substrate having a first region, a second region, and a third region;

a first base on the first region and a second base on the second region;

a plurality of first fin-shaped structures on the first base;

a single second fin-shaped structure on the second base, wherein a sidewall of the single second fin-shaped structure is aligned with a sidewall of the second base;

a first shallow trench isolation (STI) between the first fin-shaped structures and the second fin-shaped structure;

a second STI adjacent to the second fin-shaped structure; and

a third base on the third region, wherein a top surface of the third base is higher than the top surfaces of the first base and the second base.

2. The semiconductor device of claim 1 , wherein the substrate, the first base, the second base, the third base, the first fin-shaped structures, and the second fin-shaped structure comprise same material.

3. The semiconductor device of claim 1 , wherein the first STI and the second STI comprise different depths.

4. The semiconductor device of claim 1 , further comprising a third STI between the first base and the third base.

5. The semiconductor device of claim 4 , wherein the top surfaces of the first STI, the second STI, and the third STI are coplanar.

6. The semiconductor device of claim 1 , wherein a first sidewall of the second base is aligned with a second sidewall of the second fin-shaped structure and a third sidewall of the second base is not aligned with a fourth sidewall of the second fin-shaped structure.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 26, 2021
From: UNITED MICROELECTRONICS CORPORATION
To: MARLIN SEMICONDUCTOR LIMITED
Reel/Frame 056991/0292 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 3, 2015
From: FENG, LI-WEI; TSAI, SHIH-HUNG; LIN, CHAO-HUNG; HONG, SHIH-FANG; JENQ, JYH-SHYANG
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 036234/0215 →