Semiconductor structure and fabrication method thereof
View Patent ↗A semiconductor structure includes a substrate, an oxide layer, a metallic oxynitride layer and a metallic oxide layer. The oxide layer is located on the substrate. The metallic oxynitride layer is located on the oxide layer. The metallic oxide layer is located on the metallic oxynitride layer. In addition, the present invention also provides a semiconductor process for forming the semiconductor structure.
1. A semiconductor structure, comprising:
a substrate;
an oxide layer located on the substrate;
a metallic oxynitride layer located on the oxide layer, wherein the metallic oxynitride layer comprises an indium oxynitride layer;
a metallic oxide layer located on the metallic oxynitride layer, wherein the metallic oxide layer comprises a hafnium oxide layer or a zirconium oxide layer; and
a gate electrode layer directly covering the entire metallic oxide layer.
2. The semiconductor structure according to claim 1 , wherein the oxide layer comprises a silicon dioxide layer.
3. A semiconductor process, comprising:
providing a substrate;
forming an oxide layer on the substrate;
forming a metallic nitride layer on the oxide layer, wherein the metallic nitride layer comprises a gallium nitride layer or an indium nitride layer;
forming a metallic oxide layer on the metallic nitride layer;
forming a gate electrode layer directly covering the entire metallic oxide layer; and
performing a thermal treatment process after the gate electrode layer is formed to oxidize the metallic nitride layer into a metallic oxynitride layer wherein at least a part of the metallic oxide layer still remains.
4. The semiconductor process according to claim 3 , wherein the oxide layer comprises a silicon dioxide layer.
5. The semiconductor process according to claim 4 , wherein the substrate comprises a silicon substrate and the silicon dioxide layer comprises being formed by a thermal oxidation process or a chemical oxidation process.
6. The semiconductor process according to claim 3 , wherein the metallic oxynitride layer comprises a gallium oxynitride layer or an indium oxynitride layer.
7. The semiconductor process according to claim 3 , wherein the metallic oxide layer comprises a hafnium oxide layer or a zirconium oxide layer.
8. The semiconductor process according to claim 3 , wherein the thermal treatment process comprises a thermal annealing process.
9. The semiconductor process according to claim 8 , wherein the thermal annealing process comprises a rapid thermal annealing process or an oxygen-containing thermal annealing process.
10. The semiconductor process according to claim 8 , wherein oxygen atoms used during performing the thermal treatment process to oxidize the metallic nitride layer are from the thermal annealing process.
11. The semiconductor process according to claim 3 , wherein oxygen atoms used during performing the thermal treatment process to oxidize the metallic nitride layer are from the metallic oxide layer.
12. The semiconductor process according to claim 11 , wherein after performing the thermal treatment process, the thickness of the metallic oxide layer is thinning.