Gyrator with feedback resistors
A gyrator includes a gyrator core and at least one common mode feedback circuit. The gyrator core includes four inverters mutually connected in a loop configuration between a pair of input ends and a pair of output ends. The common mode feedback circuit is provided between the pair of input ends and/or the pair of output ends and includes a forward-reverse connection inverter set and a backward-reverse connection inverter set. The forward-reverse connection inverter set has a first inverter, a second inverter connected in reverse series with the first inverter, and a first feedback resistor connected in parallel with the second inverter. The backward-reverse connection inverter set has a third inverter, a fourth inverter connected in reverse series with the third inverter, and a second feedback resistor connected in parallel with the fourth inverter.
1. A gyrator with feedback resistors, the gyrator comprising:
a gyrator core comprising four inverters mutually connected in a loop configuration between a pair of input ends and a pair of output ends; and
at least a common mode feedback section electrically connected between the pair of the input ends or the pair of the output ends, the common mode feedback section comprising:
a forward-reverse series connection inverter set comprising:
a first inverter;
a second inverter electrically connected in reverse series with the first inverter; and
a first feedback resistor electrically connected in parallel with the second inverter; and
a backward-reverse series connection inverter set electrically connected in anti-parallel with the forward-reverse series connection inverter set, the backward-reverse series connection inverter set comprising:
a third inverter;
a fourth inverter electrically connected in reverse series with the third inverter; and
a second feedback resistor electrically connected in parallel with the fourth inverter.
2. The gyrator of claim 1 , wherein at least one of the four inverters of the gyrator core, the first inverter, the second inverter, the third inverter, or the fourth inverter comprises a transistor.
3. The gyrator of claim 2 , wherein the transistor is a MOS transistor.
4. The gyrator of claim 2 , wherein the transistor is a CMOS transistor.
5. The gyrator of claim 2 , wherein the transistor is a bi-polar transistor.
6. The gyrator of claim 2 , wherein the transistor is selected to satisfy a stable condition |y LE 2 (jw 0 )|>g m 2 , where w 0 is an existing smallest positive number making 2 w 0 τ+∠y LE 2 (jw 0 )=π, y LE 2 (s) is an effective loading product of the gyrator core, τ is an effective channel delay, and g m is an effective gyrating constant.
7. The gyrator of claim 2 , wherein the four inverters of the gyrator core, the first inverter, the second inverter, the third inverter, and the fourth inverter are all identical, the first feedback resistor has a zero first resistance, the second feedback resistor has a zero second resistance, and the transistor is selected to satisfy a stable condition
tan
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A
0
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where A 0 =gm/g is a DC gain of the gyrator, g is an effective conductive loading of the gyrator core, c is an effective capacitive loading, gm is an effective gyrating constant, and cm is an effective trans-capacitance.