Method for testing analog and mixed-signal circuits using dynamic element matching for source linearization
View Patent ↗A method of testing an analog and/or mixed-signal circuit can be used in either a production or a built-in self test environment. The method includes generating an excitation signal for testing by using dynamic element matching for performance enhancement of the test signal generator that applies an excitation, and/or by measuring an output of the DUT using dynamic element matching for performance enhancement of an output measurement device. Signal generators and circuits using aspects of the method are also discussed.
1. A method of testing an analog and/or mixed-signal circuit comprising:
generating an excitation signal for testing using dynamic element matching;
applying the excitation signal to the circuit to provide an output;
characterizing the circuit at least partially based on the output.
2. The method of claim 1 wherein the dynamic element matching is deterministic.
3. The method of claim 1 wherein the dynamic element matching is random.
4. The method of claim 1 wherein the characterizing is performed with built-in self-test (BIST).
5. The method of claim 1 wherein the characterizing is performed during production testing.
6. The method of claim 1 wherein the characterizing comprises testing for integral nonlinearity (INL).
7. The method of claim 1 wherein the characterizing comprises testing for differential nonlinearity (DNL).
8. The method of claim 1 wherein the characterizing comprises testing for Spurious Free Dynamic Range (SFDR).
9. The method of claim 1 wherein the characterizing comprises testing for Total Harmonic Distortion (THD).
10. The method of claim 1 wherein the circuit is a data converter.
11. The method of claim 1 wherein the step of generating is performed with a signal generator.
12. The method of claim 11 wherein a switching sequence for the dynamic element matching is selected to simplify the signal generator.
13. The method of claim 11 wherein a control logic for the dynamic element matching is selected to simplify the signal generator.
14. A signal generator for testing an analog or mixed-signal circuit, comprising:
a plurality of matching-critical elements;
switching control logic associated with the plurality of matching-critical elements for generating an excitation signal for testing using dynamic element matching;
an output from the signal generator to a device under test for applying the excitation signal to the device under test.
15. The signal generator of claim 14 wherein the device under test provides an output for use by a performance evaluation structure.
16. The signal generator of claim 14 wherein the dynamic element matching is deterministic.
17. The signal generator of claim 14 wherein the dynamic element matching is random.
18. A method of testing an analog and/or mixed-signal circuit comprising:
generating an excitation signal for testing;
applying the excitation signal to the circuit;
measuring an output of the circuit using dynamic element matching; and
characterizing the circuit at least partially based on the output.
19. The method of claim 18 wherein the dynamic element matching is deterministic.
20. The method of claim 18 wherein the dynamic element matching is random.
21. The method of claim 18 wherein the testing is built-in self-test (BIST).
22. The method of claim 18 wherein the testing is production testing.
23. The method of claim 18 wherein the step of generating an excitation signal for testing is performed using dynamic element matching.
24. The method of claim 18 wherein the circuit is a data converter.
25. A circuit comprising:
a device under test; a signal generator comprising (a) a plurality of matching-critical elements, (b) switching control logic associated with the plurality of matching-critical elements for generating an excitation signal for testing using dynamic element matching; an output measurement device for determining a measured response of the device under test;
a performance evaluation structure operatively connected to the device under test for determining the performance of the device under test based on the measured response; and
a feedback control loop operatively connected to the device under test and the performance evaluation structure for providing performance feedback to the device under test.
26. The circuit of claim 25 wherein the device under test is a data converter.
27. The circuit of claim 25 wherein the dynamic element matching is deterministic.
28. The circuit of claim 25 wherein the dynamic element matching is random.
29. The circuit of claim 25 wherein the output measurement device comprises a plurality of matching critical elements.