IP Library Granted Patent US 7,339,250
Granted Patent B2
US 7,339,250 · App. 10/914,163 · Granted Mar 4, 2008

Semiconductor integrated circuit having reduced cross-talk noise

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Quick Facts
Patent No.
US 7,339,250
App. No.
10/914,163
Granted
Mar 4, 2008
Kind
B2
Abstract

A semiconductor integrated circuit includes a shielded wire line and a shielding wire line provided for the shielded wire line and divided into a plurality of segments in a longitudinal direction of the shielded wire line.

Claims (4)

1. A semiconductor integrated circuit, comprising: a shielded wire line;

a shielding wire line provided along only a portion of an entire extent of the shielded wire line;

a driver that transmits a signal to the shielded wire line; and

a receiver that receives the signal from the shielded wire line, wherein the shielding wire line has a first end that is positioned alongside the driver and a second end that is positioned alongside the shielded wire line, the shielding wire line shielding less than 100% and more than approximately 70% of a total length of the shielded wire line.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2015
From: FUJITSU SEMICONDUCTOR LIMITED
To: SOCIONEXT INC.
Reel/Frame 035507/0851 →
CHANGE OF NAME Recorded Jul 22, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024982/0245 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 12, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021998/0645 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 6, 2007
From: USHIYAMA, KENICHI; ICHINOSE, SHIGENORI
To: FUJITSU LIMITED
Reel/Frame 020203/0847 →