IP Library Patent Application 10916536
Patent Application
App. No. 10/916,536

High availability/high density system and method

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Quick Facts
Patent No.
US None
App. No.
10/916,536
Abstract

A system and method for providing high availability for telecommunications and data communications by implementing a network bus architecture at a card level. The network bus architecture, which may be a combination of hardware, software, and APIs, replaces the conventional midplane/backplane as the system bus for PCI purposes. The system provides physical redundancy to the system by connecting ports of the various system cards using dual/redundant ethernet switches. Further, since the system cards are connected through network connections, failure of any component is interpreted and addressed as a network failure instead of as a hardware failure.

Claims (29)

1 . A high availability telecom/datacom architecture comprising:

dual/redundant ethernet switches;

a plurality of I/O cards connected to the dual/redundant ethernet switches; and

at least two CPUs coupled to each other and to the plurality of I/O cards via the ethernet switches.

2 . The architecture of claim 1 further comprising:

a system monitor and control module coupled to the at least two CPUs and the plurality of I/O cards via the ethernet switches.

3 . A high availability telecom/datacom architecture comprising:

dual/redundant network links;

a plurality of I/O cards connected to the dual/redundant network links; and

a system controller coupled to the plurality of I/O cards via the dual/redundant network links.

4 . The architecture of claim 3 wherein the system controller comprises multiple CPUs coupled to each other and to the plurality of I/O cards via the dual/redundant network links.

5 . The architecture of claim 3 wherein the dual/redundant network links are implemented using ethernet switches.

6 . The architecture of claim 4 wherein the dual/redundant network links are implemented using ethernet switches.

7 . The architecture of claim 3 further comprising:

a system monitor and control module coupled to the system controller and the plurality of I/O cards via the network links.

8 . The architecture of claim 5 further comprising:

a system monitor and control module coupled to the system controller and the plurality of I/O cards via the network links.

9 . A network bus architecture for providing high availability to telecom/datacom systems comprising:

dual/redundant network links;

a plurality of I/O cards connected to the dual/redundant network links; and,

a system controller coupled to each other and to the plurality of I/O cards via the dual/redundant network links.

10 . The network bus architecture of claim 9 wherein the network links are implemented using ethernet switches.

11 . The architecture of claim 10 wherein the system controller comprises multiple CPUs coupled to each other and to the plurality of I/O cards via the ethernet switches.

12 . The architecture of claim 9 wherein the system controller comprises multiple CPUs coupled to each other and to the plurality of I/O cards via the network links.

13 . The architecture of claim 9 further comprising:

a system monitor and control node coupled to the system controller and the plurality of I/O cards.

14 . The architecture of claim 12 further comprising:

a system monitor and control node coupled to the system controller and the plurality of I/O cards.

15 . The architecture of claim 9 further comprising software and APIs.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 28, 2012
From: RADISYS INTERNATIONAL LLC
To: RADISYS CORPORATION
Reel/Frame 029539/0822 →
CHANGE OF NAME Recorded Dec 27, 2012
From: CONTINUOUS COMPUTING CORPORATION
To: RADISYS INTERNATIONAL LLC
Reel/Frame 029548/0520 →
RELEASE OF SECURITY INTEREST Recorded Aug 13, 2009
From: COMERICA BANK
To: CONTINUOUS COMPUTING CORPORATION
Reel/Frame 023094/0094 →
SECURITY AGREEMENT Recorded Nov 7, 2005
From: CONTINUOUS COMPUTING CORPORATION
To: COMERICA BANK
Reel/Frame 016735/0602 →