IP Library Granted Patent US 6,954,001
Granted Patent B2
US 6,954,001 · App. 10/919,402 · Granted Oct 11, 2005

Semiconductor device including a diffusion layer

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Quick Facts
Patent No.
US 6,954,001
App. No.
10/919,402
Granted
Oct 11, 2005
Kind
B2
Abstract

The semiconductor device includes a semiconductor element having an electrode formed on a surface thereof, and a metal wiring formed on the surface of the semiconductor element and electrically connected to the electrode. The metal wiring has an external electrode portion functioning as an external electrode. A thickness of the external electrode portion is greater than that of a non-electrode portion of the metal wiring, i.e., a portion of the metal wiring other than the external electrode portion.

Claims (37)

1. A semiconductor device, comprising:

a semiconductor element;

a first electrode portion formed on the semiconductor element, said first electrode portion comprising a first metal component;

a second electrode portion formed on the semiconductor element and electrically connected to said first electrode portion, said second electrode portion comprising a second metal component different from said first metal component; and

a diffusion layer formed between said first electrode portion and said second electrode portion,

wherein said diffusion layer comprises said first metal component and said second metal component.

2. The semiconductor device of claim 1 , wherein said first metal component includes copper and said second metal component includes tin.

3. The semiconductor device of claim 1 , further comprising a third electrode portion formed on a surface of the semiconductor element and a metal wiring formed on the semiconductor element, said metal wiring electrically connecting the first electrode portion to the third electrode portion.

4. The semiconductor device of claim 3 , wherein the first and third electrode portion are horizontally spaced apart with respect to the semiconductor element.

5. The semiconductor device of claim 3 , further comprising an insulating film formed on said metal wiring,

wherein an opening of said insulating film exposes a surface of the first electrode portion, and

wherein said surface of the first electrode portion is flush with or higher than a surface of the insulating film.

6. The semiconductor device of claim 3 , wherein the metal wiring includes copper.

7. The semiconductor device of claim 3 , further comprising an insulating resin layer formed between the surface of the semiconductor element and the metal wiring,

wherein the metal wiring is formed along a surface of the insulating resin layer.

8. The semiconductor device of claim 3 , wherein the metal wiring has a thickness in the range of 0.01 μm to 8 μm.

9. The semiconductor device of claim 1 , further comprising a substrate having a wiring electrode,

wherein said wiring electrode is electrically connected to said second electrode portion.

10. A semiconductor device comprising:

a semiconductor element;

a first electrode portion formed on the semiconductor element, said first electrode portion comprising a first metal component;

a second electrode portion formed on the semiconductor element and electrically connected to said first electrode portion, said second electrode portion comprising a second metal component different from said first metal component; and

a diffusion layer formed between said first electrode portion and said second electrode portion,

wherein said diffusion layer comprises said first metal component and said second metal component, and

said first electrode portion and said diffusion layer have a combined thickness in the range of 10 μm to 20 m.

11. The semiconductor device of claim 10 , wherein said first metal component includes copper and said second metal component includes tin.

12. The semiconductor device of claim 10 , further comprising a third electrode portion formed on a surface of the semiconductor element and a metal wiring formed on the semiconductor element, said metal wiring electrically connecting the first electrode portion to the third electrode portion.

13. The semiconductor device of claim 12 , wherein the first electrode portion and the third electrode portion are horizontally spaced apart with respect to the semiconductor element.

14. The semiconductor device of claim 12 , further comprising an insulating film formed on said metal wiring,

wherein an opening of said insulating film exposes a surface of the first electrode portion, and

wherein said surface of the first electrode portion is flush with or higher than a surface of the insulating film.

15. The semiconductor device of claim 12 , wherein the metal wiring includes copper.

16. The semiconductor device of claim 12 , further comprising an insulating resin layer formed between the surface of the semiconductor element and the metal wiring,

wherein the metal wiring is formed along a surface of the insulating resin layer.

17. The semiconductor device of claim 12 , wherein the metal wiring has a thickness in the range of 0.01 μm to 8 μm.

18. The semiconductor device of claim 10 , further comprising a substrate having a wiring electrode,

wherein said wiring electrode is electrically connected to said second electrode portion.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded Jun 11, 2020
From: ROYAL BANK OF CANADA
To: TESSERA, INC.; INVENSAS BONDING TECHNOLOGIES, INC. (F/K/A ZIPTRONIX, INC.); FOTONATION CORPORATION (F/K/A DIGITALOPTICS CORPORATION AND F/K/A DIGITALOPTICS CORPORATION MEMS); INVENSAS CORPORATION; TESSERA ADVANCED TECHNOLOGIES, INC; DTS, INC.; DTS LLC; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
Reel/Frame 052920/0001 →
SECURITY INTEREST Recorded Jun 1, 2020
From: ROVI SOLUTIONS CORPORATION; ROVI TECHNOLOGIES CORPORATION; ROVI GUIDES, INC.; TIVO SOLUTIONS INC.; VEVEO, INC.; INVENSAS CORPORATION; INVENSAS BONDING TECHNOLOGIES, INC.; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: BANK OF AMERICA, N.A.
Reel/Frame 053468/0001 →
SECURITY INTEREST Recorded Dec 2, 2016
From: INVENSAS CORPORATION; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; ZIPTRONIX, INC.; DIGITALOPTICS CORPORATION; DIGITALOPTICS CORPORATION MEMS; DTS, LLC; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: ROYAL BANK OF CANADA, AS COLLATERAL AGENT
Reel/Frame 040797/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 25, 2016
From: PANNOVA SEMIC, LLC
To: TESSERA ADVANCED TECHNOLOGIES, INC.
Reel/Frame 037581/0466 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 7, 2015
From: PANASONIC CORPORATION
To: PANNOVA SEMIC, LLC
Reel/Frame 036065/0273 →
CHANGE OF NAME Recorded Sep 19, 2014
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 033777/0873 →