AD conversion method
View Patent ↗At step S 1 , an analog signal is input. At step S 2 , a high potential and a low potential input to a DA converter are respectively selected. At step S 3 , a first AD conversion of the analog signal is performed. At step S 4 , a voltage range is narrowed down by respectively switching the high potential and the low potential on the basis of conversion data from the first AD conversion. At step S 5 , a second AD conversion of the analog signal is performed. At step S 6 , the conversion data from the first AD conversion and conversion data from the second AD conversion are combined to be output as a single digital signal.
1. An AD conversion method using an AD converter, said AD converter comprising:
an analog input terminal to which a first analog signal to be subjected to AD conversion is input;
a DA converter having a resolution of prescribed bits and applied with a high potential and a low potential;
a comparator performing a comparison operation between a second analog signal output from said DA converter and said first analog signal; and
a digital output terminal outputting a digital signal on the basis of a comparison result output from said comparator,
said AD conversion method comprising the steps of:
(a) inputting said first analog signal from said analog input terminal;
(b) obtaining a first comparison result by performing said comparison operation with a prescribed first high potential and a prescribed first low potential being supplied to said DA converter;
(c) switching said first high potential and said first low potential supplied to said DA converter to a second high potential and a second low potential, respectively, on the basis of said first comparison result;
(d) obtaining a second comparison result by performing said comparison operation after said step (c); and
(e) generating a digital signal on the basis of said first and second comparison results and outputting said digital signal from said digital output terminal.
2. The AD conversion method according to claim 1 , wherein
said step (b) comprises the step of obtaining said first comparison result that only corresponds to prescribed high order bits.
3. The AD conversion method according to claim 1 , wherein
said step (e) comprises the steps of:
storing said first comparison result in the high order bit part in a register; and
storing said second comparison result in the low order bit part in said register.
4. The AD conversion method according to claim 2 , wherein
said step (e) comprises the steps of:
storing said first comparison result in the high order bit part in a register; and
storing said second comparison result in the low order bit part in said register.
5. The AD conversion method according to claim 1 , wherein
said second high potential and said second low potential are generated using a voltage down converter.
6. The AD conversion method according to claim 2 , wherein
said second high potential and said second low potential are generated using a voltage down converter.
7. The AD conversion method according to claim 3 , wherein
said second high potential and said second low potential are generated using a voltage down converter.
8. The AD conversion method according to claim 4 , wherein
said second high potential and said second low potential are generated using a voltage down converter.
9. The AD conversion method according to claim 1 , further comprising the step of:
waiting a prescribed time interval after said step (c) to thereby stabilize a power supply potential supplying said second high potential and said second low potential.
10. The AD conversion method according to claim 2 , further comprising the step of:
waiting a prescribed time interval after said step (c) to thereby stabilize a power supply potential supplying said second high potential and said second low potential.
11. The AD conversion method according to claim 3 , further comprising the step of:
waiting a prescribed time interval after said step (c) to thereby stabilize a power supply potential supplying said second high potential and said second low potential.
12. The AD conversion method according to claim 4 , further comprising the step of:
waiting a prescribed time interval after said step (c) to thereby stabilize a power supply potential supplying said second high potential and said second low potential.
13. The AD conversion method according to claim 5 , further comprising the step of:
waiting a prescribed time interval after said step (c) to thereby stabilize a power supply potential supplying said second high potential and said second low potential.
14. The AD conversion method according to claim 6 , further comprising the step of:
waiting a prescribed time interval after said step (c) to thereby stabilize a power supply potential supplying said second high potential and said second low potential.
15. The AD conversion method according to claim 7 , further comprising the step of:
waiting a prescribed time interval after said step (c) to thereby stabilize a power supply potential supplying said second high potential and said second low potential.
16. The AD conversion method according to claim 8 , further comprising the step of:
waiting a prescribed time interval after said step (c) to thereby stabilize a power supply potential supplying said second high potential and said second low potential.