Ternary and higher multi-value digital scramblers/descramblers
Ternary (3-value) and higher, multi-value digital scramblers/descramblers in digital communications. The method and apparatus of the present invention includes the creation of ternary (3-value) and higher value truth tables that establish ternary and higher value scrambling functions which are its own descrambling functions. The invention directly codes by scrambling ternary and higher-value digital signals and directly decodes by descrambling with the same function. A disclosed application of the invention is the creation of composite ternary and higher-value scrambling devices and methods consisting of single scrambling devices or functions combined with ternary or higher value shift registers. Another disclosed application is the creation of ternary and higher-value spread spectrum digital signals. Another disclosed application is a composite ternary or higher value scrambling system, comprising an odd number of scrambling functions and the ability to be its own descrambler.
1. A method of scrambling an unknown ternary signal with a known ternary signal, the known and unknown ternary signals being able to assume one of three states, comprising:
inputting the unknown ternary signal to a first input of a scrambling ternary logic device;
inputting the known ternary signal to a second input of the scrambling ternary logic device;
the scrambling ternary logic device implementing a ternary logic function, sc, that satisfies the following equations:
(1) A sc B=C, where A is the unknown signal, B is the known ternary signal and C is the output from the ternary logic device;
(2) C sc B=A, if C and B were input to the ternary logic device; and
(3) A sc C=B; if A and C were input to the ternary logic device; and
outputting a scrambled ternary signal from an output of the scrambling ternary logic device.
2. The method as claimed in claim 1 , wherein the ternary logic function, sc, is defined by the following truth table:
In2
In1
0
1
2
0
0
2
1
1
2
1
0
2
1
0
2.
3. The method as claimed in claim 1 , wherein the ternary logic function, sc, is defined by the following truth table:
In2
In1
0
1
2
0
1
0
2
1
0
2
1
2
2
1
0.
4. The method as claimed in claim 1 , wherein the ternary logic function, sc, is defined by the following truth table:
In2
In1
0
1
2
0
2
1
0
1
1
0
2
2
0
2
1.
5. The method as claimed in claim 1 , comprising:
inputting the scrambled ternary signal to a first input of a descrambling ternary logic device;
inputting the known ternary signal to a second input of the descrambling ternary logic device;
the descrambling ternary logic device implementing a ternary logic function, sc; and
outputting the unknown ternary signal on an output of the descrambling ternary logic device.
6. The method as claimed in claim 5 , wherein the ternary logic function, sc, is defined by the following truth table:
In2
In1
0
1
2
0
0
2
1
1
2
1
0
2
1
0
2.
7. The method as claimed in claim 5 , wherein the ternary logic function, sc, is defined by the following truth table:
In2
In1
0
1
2
0
1
0
2
1
0
2
1
2
2
1
0.
8. The method as claimed in claim 5 , wherein the ternary logic function, sc, is defined by the following truth table:
In2
In1
0
1
2
0
2
1
0
1
1
0
2
2
0
2
1.
9. Apparatus for scrambling an unknown ternary signal with a known ternary signal, the unknown and known ternary signals being able to assume one of three states, comprising:
a scrambling ternary logic device having a first input, a second input and an output:
the unknown ternary signal being connected to the first input of the scrambling ternary logic device;
the known ternary signal being connected to the second input of the scrambling ternary logic device;
the scrambling ternary logic device implementing a ternary logic function, sc, that satisfies the following equations:
(1) A sc B=C, where A is the unknown signal, B is the known ternary signal and C is the output from the ternary logic device;
(2) C sc B=A, if C and B were input to the ternary logic device; and
(3) A sc C=B; if A and C were input to the ternary logic device;
whereby a scrambled ternary signal is provided on the output of the scrambling ternary logic device.
10. The apparatus as claimed in claim 9 , wherein the ternary logic function, sc, is defined by the following truth table:
In2
In1
0
1
2
0
0
2
1
1
2
1
0
2
1
0
2.
11. The apparatus as claimed in claim 9 , wherein the ternary logic function, sc, is defined by the following truth table:
In2
In1
0
1
2
0
1
0
2
1
0
2
1
2
2
1
0.
12. The apparatus as claimed in claim 9 , wherein the ternary logic function, sc, is defined by the following truth table:
In2
In1
0
1
2
0
2
1
0
1
1
0
2
2
0
2
1.
13. The apparatus as claimed in claim 9 , comprising:
a descrambling ternary logic device having a first input, a second input and an output;
the scrambled ternary signal being connected to the first input of the descrambling ternary logic device;
the known ternary signal being connected to the second input of the descrambling ternary logic device;
the descrambling ternary logic device implementing a ternary logic function, sc; and
the unknown ternary signal being provided on the output of the descrambling ternary logic device.
14. The apparatus as claimed in claim 13 , wherein the ternary logic faction, sc, is defined by the following truth table:
In2
In1
0
1
2
0
0
2
1
1
2
1
0
2
1
0
2.
15. The apparatus as claimed in claim 13 , wherein the ternary logic function, sc, is defined by the following truth table:
In2
In1
0
1
2
0
1
0
2
1
0
2
1
2
2
1
0.
16. The apparatus as claimed in claim 13 , wherein the ternary logic function, sc, is defined by the following truth table:
In2
In1
0
1
2
0
2
1
0
1
1
0
2
2
0
2
1.
17. A method of scrambling an unknown x-value signal with a known x-value signal, the known and unknown x-value signals being able to assume one of x states, wherein x is greater than or equal to 3, comprising:
inputting the unknown x-value signal to a first input of a scrambling x-value logic device;
inputting the known x-value signal to a second input of the scrambling x-value logic device;
the scrambling x-value logic device implementing a x-value logic function, fc, that satisfies the following equations:
(1) A fc B=C, where A is the unknown signal, B is the known x-value signal and C is the output from the x-value logic device;
(2) C fc B=A, if C and B were input to the x-value logic device; and
(3) A fc C=B; if A and C were input to the x-value logic device; and
outputting a scrambled x-value signal from an output of the scrambling x-value logic device.
18. The method as claimed in claim 17 , wherein the x-value signal can assume one of four values, and the x-value logic function, fc, is defined by the following truth table:
In2
In1
0
1
2
3
0
0
3
2
1
1
3
2
1
0
2
2
1
0
3
3
1
0
3
2.
19. The method is claimed in claim 17 , wherein the x-value signal can assume one of four values, and the x-value logic function, fc, is defined by the following truth table:
In2
In1
0
1
2
3
0
1
0
3
2
1
0
3
2
1
2
3
2
1
0
3
2
1
0
3.
20. The method as claimed in claim 17 , wherein the x-value signal can assume one of four values, and the x-value logic function, fc, is defined by the following truth table:
In2
In1
0
1
2
3
0
2
1
0
3
1
1
0
3
2
2
0
3
2
1
3
3
2
1
0.
21. The method as claimed in claim 17 , wherein the x-value signal can assume one of four values, and the x-value logic function, fc, is defined by the following truth table:
In2
In1
0
1
2
3
0
3
2
1
0
1
2
1
0
3
2
1
0
3
2
3
0
3
2
1.
22. The method as claimed in claim 17 , wherein the x-value signal can assume one of n values, and the x-value logic function, fc, is defined by the truth table set forth below or by a truth table derived therefrom by continually moving the row n- 1 to row 0 and moving rows 0 to n- 2 down one row:
In2
In1
0
1
2
3
. . .
. . .
n-2
n-1
0
0
n-1
n-2
. . .
. . .
. . .
2
1
1
n-1
n-2
n-3
. . .
. . .
. . .
1
0
2
n-2
n-3
n-4
. . .
. . .
. . .
0
n-1
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
n-2
2
1
0
. . .
. . .
. . .
4
3
n-1
1
0
n-1
. . .
. . .
. . .
3
2.
23. The method as claimed in claim 17 , comprising:
inputting the scrambled x-value signal to a first input of a descrambling x-value logic device;
inputting the known x-value signal to a second input of the descrambling x-value logic device;
the descrambling x-value logic device implementing a x-value logic function, fc; and
outputting the unknown x-value signal on an output of the descrambling x-value logic device.
24. The method as claimed in claim 23 , wherein the x-value signal can assume one of four values, and the x-value logic function, fc, is defined by the following truth table:
In2
In1
0
1
2
3
0
0
3
2
1
1
3
2
1
0
2
2
1
0
3
3
1
0
3
2.
25. The method as claimed in claim 23 , wherein the x-value signal can assume one of four values, and the x-value logic function, fc, is defined by the following truth table:
In2
In1
0
1
2
3
0
1
0
3
2
1
0
3
2
1
2
3
2
1
0
3
2
1
0
3.
26. The method as claimed in claim 23 , wherein the x-value signal can assume one of four values, and the x-value logic function, fc, is defined by the following truth table:
In2
In1
0
1
2
3
0
2
1
0
3
1
1
0
3
2
2
0
3
2
1
3
3
2
1
0.
27. The method as claimed in claim 23 , wherein the x-value signal can assume one of four values, and the x-value logic function, fc, is defined by the truth table set forth below or by a truth derived there from by continually moving the row n- 1 results to row 0 and moving rows 0 to n- 2 down one now:
In2
In1
0
1
2
3
0
3
2
1
0
1
2
1
0
3
2
1
0
3
2
3
0
3
2
1.
28. The method as claimed in claim 23 , wherein the x-value signal can assume one of n values, and the x-value logic function, fc, is defined by the truth table set forth below or by a truth table derived therefrom by continually moving the row n- 1 to row 0 and moving rows 0 to n- 2 down one row:
In2
In1
0
1
2
3
. . .
. . .
n-2
n-1
0
0
n-1
n-2
. . .
. . .
. . .
2
1
1
n-1
n-2
n-3
. . .
. . .
. . .
1
0
2
n-2
n-3
n-4
. . .
. . .
. . .
0
n-1
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
n-2
2
1
0
. . .
. . .
. . .
4
3
n-1
1
0
n-1
. . .
. . .
. . .
3
2.
29. Apparatus for scrambling an unknown x-value signal with a known x-value signal, the unknown and known x-value signals being able to assume one of x states, comprising:
a scrambling x-value logic device having a first input, a second input and an output:
the unknown x-value signal being connected to the first input of the scrambling x-value logic device;
the known x-value signal being connected to the second input of the scrambling x-value logic device;
the scrambling x-value logic device implementing a x-value logic function, fc, that satisfies the following equations:
(1) A fc B=C, where A is the unknown signal, B is the known x-value signal and C is the output from the x-value logic device;
(2) C fc B=A, if C and B were input to the x-value logic device; and
(3) A fc C=B; if A and C were input to the x-value logic device;
whereby a scrambled x-value signal is provided on the output of the scrambling x-value logic device.
30. The apparatus as claimed in claim 28 , wherein the x-value signal can assume one of four values, and the x-value logic function, fc, is defined by the following truth table:
In2
In1
0
1
2
3
0
0
3
2
1
1
3
2
1
0
2
2
1
0
3
3
1
0
3
2.
31. The apparatus as claimed in claim 28 , wherein the x-value signal can assume one of four values, and the x-value logic faction, fc, is defined by the following truth table:
In2
In1
0
1
2
3
0
1
0
3
2
1
0
3
2
1
2
3
2
1
0
3
2
1
0
3.
32. The apparatus as claimed in claim 28 , wherein the x-value signal can assume one of four values, and the x-value logic function, fc, is defined by the following truth table:
In2
In1
0
1
2
3
0
2
1
0
3
1
1
0
3
2
2
0
3
2
1
3
3
2
1
0.
33. The apparatus as claimed in claim 28 , wherein the x-value signal can assume one of four values, and the x-value logic function, fc, is defined by the following truth table:
In2
In1
0
1
2
3
0
3
2
1
0
1
2
1
0
3
2
1
0
3
2
3
0
3
2
1.
34. The apparatus as claimed in claim 28 , wherein the x-value signal can assume one of n values, and the x-value logic function, fc, is defined by the truth table set forth below or by a truth table derived therefrom by continually moving the row n- 1 to row 0 and moving rows 0 to n- 2 down one row:
In2
In1
0
1
2
3
. . .
. . .
n-2
n-1
0
0
n-1
n-2
. . .
. . .
. . .
2
1
1
n-1
n-2
n-3
. . .
. . .
. . .
1
0
2
n-2
n-3
n-4
. . .
. . .
. . .
0
n-1
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
n-2
2
1
0
. . .
. . .
. . .
4
3
n-1
1
0
n-1
. . .
. . .
. . .
3
2.
35. The apparatus as claimed in claim 28 , comprising:
a descrambling x-value logic device having a first input, a second input and an output;
the scrambled x-value signal being input to the first input of the descrambling x-value logic device;
the unknown x-value signal being input to the second input of the descrambling x-value logic device;
the descrambling x-value logic device implementing a x-value logic function, sc; and
outputting the unknown x-value signal on the output of the descrambling x-value logic device.
36. The apparatus as claimed in claim 35 , wherein the x-value signal can assume one of four values, and the x-value logic function, fc, is defined by the following truth table:
In2
In1
0
1
2
3
0
0
3
2
1
1
3
2
1
0
2
2
1
0
3
3
1
0
3
2.
37. The apparatus as claimed in claim 35 , wherein the x-value signal can assume one of four values, and the x-value logic function, fc, is defined by the following truth table:
In2
In1
0
1
2
3
0
1
0
3
2
1
0
3
2
1
2
3
2
1
0
3
2
1
0
3.
38. The apparatus as claimed in claim 35 , wherein the x-value signal can assume one of four values, and the x-value logic function, fc, is defined by the following truth table:
In2
In1
0
1
2
3
0
2
1
0
3
1
1
0
3
2
2
0
3
2
1
3
3
2
1
0.
39. The apparatus as claimed in claim 35 , wherein the x-value signal can assume one of four values, and the x-value logic function, fc, is defined by the following truth table:
In2
In1
0
1
2
3
0
3
2
1
0
1
2
1
0
3
2
1
0
3
2
3
0
3
2
1.
40. The apparatus as claimed in claim 35 , wherein the x-value signal can assume one of n values, and the x-value logic function, fc, is defined by the truth table set forth below or by a truth derived therefrom by continually moving the row n- 1 to row 0 and moving rows 0 to n- 2 down one row:
In2
In1
0
1
2
3
. . .
. . .
n-2
n-1
0
0
n-1
n-2
. . .
. . .
. . .
2
1
1
n-1
n-2
n-3
. . .
. . .
. . .
1
0
2
n-2
n-3
n-4
. . .
. . .
. . .
0
n-1
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
n-2
2
1
0
. . .
. . .
. . .
4
3
n-1
1
0
n-1
. . .
. . .
. . .
3
2.
41. A method of scrambling an unknown x-value signal, the unknown x-value signal being able to assume one of x states, x being greater than or equal to 3, comprising:
inputting the unknown x-value signal to a first input of a first scrambling x-value logic device and a first known x-value signal to a second input of the first scrambling x-value logic device;
inputting an output from the first scrambling x-value logic device to a first input of a second scrambling logic device and a second known x-value signal to a second input of the second scrambling x-value logic device;
inputting an output from the second scrambling x-value logic device to a first input of a third scrambling logic device and a second known x-value signal to a second input of the third scrambling x-value logic device;
the first, second and third scrambling x-value logic device implementing a x-value logic function, fc, that satisfies the following equations:
(1) A fc B=C, where A is the signal on the first input of the device, B is the second input of the device and C is the output from the device;
(2) C fc B=A, if C and B were input to the device; and
(3) A fc C=B; if A and C were input to the device; and
outputting a scrambled x-value signal on an output of the third scrambling x-value logic device.
42. The method as claimed in claim 41 wherein the first known x-value signal, the second known x-value signal and the third known x-value signal have different values.
43. The method as claimed in claim 41 , wherein the x-value signal can assume one of n values, and the x-value logic function, fc, is defined by the truth table set forth below or by a truth table derived therefrom by continually moving the row n- 1 to row 0 and moving rows 0 to n- 2 down one row:
In2
In1
0
1
2
3
. . .
. . .
n-2
n-1
0
0
n-1
n-2
. . .
. . .
. . .
2
1
1
n-1
n-2
n-3
. . .
. . .
. . .
1
0
2
n-2
n-3
n-4
. . .
. . .
. . .
0
n-1
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
n-2
2
1
0
. . .
. . .
. . .
4
3
n-1
1
0
n-1
. . .
. . .
. . .
3
2.
44. The method as claimed in claim 41 , further comprising:
inputting the scrambled x-value signal to a first input of a first descrambling x-value logic device and the first known x-value signal to a second input of the first descrambling x-value logic device;
inputting an output from the first scrambling x-value logic device to a first input of a second descrambling logic device and a second known x-value signal to a second input of the second descrambling x-value logic device;
inputting an output from the second descrambling x-value logic device to a first input of a third descrambling logic device and a second known x-value signal to a second input of the third descrambling x-value logic device;
the first, second and third descrambling x-value logic devices implementing a x-value logic function, fc, that satisfies the following equations:
(1) A sc B=C, where A is the signal on the first input of the device, B is the second input of the device and C is the output from the device;
(2) C sc B=A, if C and B were input to the device; and
(3) A sc C=B; if A and C were input to the device; and
outputting the unknown x-value signal on an output of the third descrambling x-value logic device.
45. Apparatus for scrambling an unknown x-value signal, the unknown x-value signal being able to assume one of x states, x being greater than or equal to 3, comprising:
a first scrambling x-value logic device having a first input, a second input and an output,
a second scrambling x-value logic device having a first input, a second input and an output,
a third scrambling x-value logic device having a first input, a second input and an output,
wherein the unknown x-value signal is connected to the first input of the first scrambling x-value logic device, a first known x-value signal is connected to the second input of the first scrambling x-value logic device, the output from the first scrambling x-value logic device is connected to the first input of the second scrambling logic device, a second known x-value signal is connected to the second input of the second scrambling x-value logic device, the output from the second scrambling x-value logic device is connected to the first input of the third scrambling logic device and a third known x-value signal is connected to the second input of the third scrambling x-value logic device;
the first, second and third scrambling x-value logic device implementing a x-value logic function, fc, that satisfies the following equations:
(1) A sc B=C, where A is the signal on the first input of the device, B is the second input of the device and C is the output from the device;
(2) C sc B=A, if C and B were input to the device; and
(3) A sc C=B; if A and C were input to the device; and
wherein a scrambled x-value signal is provided on the output of the third scrambling x-value logic device.
46. The apparatus as claimed in claim 45 wherein the first known x-value signal, the second known x-value signal and the third known x-value signal have different values.
47. The apparatus as claimed in claim 45 , wherein the x-value signal can assume one of n values, and the x-value logic function, fc, is defined by the truth table derived there from by continually moving the row n- 1 results to row 0 and moving rows 0 to n- 2 down one now:
In2
In1
0
1
2
3
. . .
. . .
n-2
n-1
0
0
n-1
n-2
. . .
. . .
. . .
2
1
1
n-1
n-2
n-3
. . .
. . .
. . .
1
0
2
n-2
n-3
n-4
. . .
. . .
. . .
0
n-1
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
. . .
n-2
2
1
0
. . .
. . .
. . .
4
3
n-1
1
0
n-1
. . .
. . .
. . .
3
2.
48. Apparatus as claimed in claim 45 , further comprising:
a first descrambling x-value logic device having a first input, a second input and an output,
a second descrambling x-value logic device having a first input, a second input and an output,
a third descrambling x-value logic device having a first input, a second input and an output,
wherein the scrambled x-value signal is connected to the first input of the first descrambling x-value logic device, a first known x-value signal is connected to the second input of the first descrambling x-value logic device, the output from the first descrambling x-value logic device is connected to the first input of the second descrambling logic device, a second known x-value signal is connected to the second input of the second descrambling x-value logic device, the output from the second descrambling x-value logic device is connected to the first input of the third descrambling logic device and a third known x-value signal is connected to the second input of the third descrambling x-value logic device;
the first, second and third descrambling x-value logic devices implementing a x-value logic function, fc, that satisfies the following equations:
(1) A sc B=C, where A is the signal on the first input of the device, B is the second input of the device and C is the output from the device;
(2) C sc B=A, if C and B were input to the device; and
(3) A sc C=B; if A and C were input to the device; and
wherein the unknown x-value signal is provided on the output of the third descrambling x-value logic device.
49. A method of scrambling an unknown x-value signal, the unknown x-value signal being able to assume one of x states, x being greater than or equal to 3, comprising:
inputting the unknown x-value signal to a first set of serially connected odd number of x-value logic devices;
inputting one or more known x-value signals to the first set of serially connected odd number of x-value logic devices;
each of the odd number of x-value logic devices implementing a x-value logic function that satisfies the following equations:
(1) A fc B=C, where A is the signal on the first input of the device, B is the second input of the device and C is the output from the device;
(2) C fc B=A, if C and B were input to the device; and
(3) A fc C=B; if A and C were input to the device; and
outputting a scrambled x-value signal on an output.
50. A method as claimed in claim 49 , comprising:
inputting the scrambled x-value signal to a second set of serially connected odd number of x-value logic devices;
inputting one of more known x-value signals to the second set of serially connected odd number of x-value logic devices;
the second set of serially connected odd number of x-value logic devices being the same as the first set of serially connected odd number of x-value logic devices; and
outputting the unknown signal on a second output.