Communication device with a self-calibrating sleep timer
View Patent ↗The present invention provides for a system for operating a communication device ( 20 ) for reception of scheduled intermittent information messages ( 22 ) with a dual mode timer ( 70 ) that extends battery life. A controller ( 50 ) schedules the timer ( 70 ) to power down all idle components of the device ( 20 ) between message receptions in a power saving sleep mode to conserve battery power. During active mode when the device is fully active in reception of messages, the timer ( 70 ) uses a reference oscillator ( 90 ) with a relatively high frequency to support digital processing by the receiver ( 26 ). During sleep mode when only the timer is powered on, a much lower frequency sleep oscillator ( 96 ) is used to maintain the lowest possible level of power consumption within the timer itself. The timer ( 70 ) has provision for automatic temperature calibration to compensate for timing inaccuracies inherent to the low-power low-frequency crystal oscillator ( 96 ) used for the sleep mode. The resultant improvement in timer accuracy during sleep mode eliminates the need for an initial reacquisition period following wake up in active mode, thereby reducing battery drain in active mode as well.
1. A battery operated wireless communication device comprising:
a wireless receiver operable to receive radio signals carrying digital messages and to extract the digital messages there from;
a reference oscillator operable to produce a reference oscillator clock;
a sleep oscillator operable to produce a sleep oscillator clock; and
a dual mode timer for continually maintaining system time based upon a reference counter output while operating in an active mode and based upon a sleep counter output when operating in a sleep mode, the dual mode timer including:
a reference counter operable to produce the reference counter output based upon the reference oscillator clock and a reference counter modulus when in the active mode;
a sleep counter operable to produce the sleep counter output based upon the sleep oscillator clock and a sleep increment value;
calibration circuitry to set the sleep increment value prior to the dual mode timer transitioning from the active mode to the sleep mode;
a switch coupled to receive the reference counter output and the sleep counter output and that is operable to produce the reference counter output when the dual mode timer is operating in the active mode and to produce the sleep counter output when the dual mode timer is operating in the sleep mode; and
a frame counter coupled to receive the output of the switch and a frame counter modulus and operable to produce multi-frame epochs based upon the output of the switch and the frame counter modulus.
2. The battery operated wireless communication device of claim 1 , wherein the calibration circuitry is operable to set the reference counter modulus based upon time of receipt of the digital messages.
3. The battery operated wireless communication device of claim 1 , further comprising a controller frequency tracker that provides automatic frequency control to the reference oscillator based upon time of receipt of the digital messages such that the reference oscillator clock is frequency-locked to the digital messages.
4. The battery operated wireless communication device of claim 1 , wherein the reference oscillator clock is not an integer multiple of the sleep oscillator clock.
5. The battery operated wireless device of claim 1 , wherein:
the reference counter output comprises reference counter frame epochs; and
the sleep counter output comprises sleep counter frame epochs.
6. The battery operated wireless communication device of claim, wherein the calibration circuitry is operable to:
determine a plurality of sleep increment values, each respective to a corresponding temperature;
store the plurality of sleep increment values and the corresponding temperatures;
when transitioning from the active mode to the sleep mode, measure a temperature of the battery operated wireless communication device; and
select the sleep increment value based upon the measured temperature for use during the sleep mode.
7. Timing circuitry for use within a wireless receiver operable to receive radio signals carrying digital messages and to extract the digital messages there from, the timing circuitry comprising:
a reference oscillator operable to produce a reference oscillator clock;
a sleep oscillator operable to produce a sleep oscillator clock; and
a dual mode timer for continually maintaining system time based upon a reference counter output while operating in an active mode and based upon a sleep counter output when operating in a sleep mode, the dual mode timer including:
a reference counter operable to produce the reference counter output based upon the reference oscillator clock and a reference counter modulus when in the active mode;
a sleep counter operable to produce the sleep counter output based upon the sleep oscillator clock and a sleep increment value;
calibration circuitry operable to set the sleep increment value prior to the dual mode timer transitioning from the active mode to the sleep mode;
a switch coupled to receive the reference counter output and the sleep counter output and that is operable to produce the reference counter output when the dual mode timer is operating in the active mode and to produce the sleep counter output when the dual mode timer is operating in the sleep mode; and
a frame counter coupled to receive the output of the switch and a frame counter modulus and operable to produce multi-frame epochs based upon the output of the switch and the frame counter modulus.
8. The timing circuitry of claim 7 , further comprising a controller frequency tracker that provides automatic frequency control to the reference oscillator based upon time of receipt of the digital messages such that the reference oscillator clock is frequency-locked to the digital messages.
9. The timing circuitry of claim 7 , wherein the reference oscillator clock is not an integer multiple of the sleep oscillator clock.
10. The timing circuitry of claim 7 , wherein:
the reference counter output comprises reference counter frame epochs; and
the sleep counter output comprises sleep counter frame epochs.
11. The timing circuitry of claim 7 , wherein the calibration circuitry is operable to:
determine a plurality of sleep increment values, each respective to a corresponding temperature;
store the plurality of sleep increment values and the corresponding temperatures;
when transitioning from the active mode to the sleep mode, measure a temperature of the battery operated wireless communication device; and
select the sleep increment value based upon the measured temperature for use during the sleep mode.
12. The timing circuitry of claim 7 , wherein the calibration circuitry comprises a servo loop operable to update the sleep increment value prior to the dual mode timer transitioning from the active mode to the sleep mode.