IP Library Granted Patent US 7,345,464
Granted Patent B2
US 7,345,464 · App. 10/941,611 · Granted Mar 18, 2008

PWM power supply controller having multiple PWM signal assertions and method therefor

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Quick Facts
Patent No.
US 7,345,464
App. No.
10/941,611
Granted
Mar 18, 2008
Kind
B2
Abstract

In one embodiment, a PWM power supply controller asserts a PWM control signal synchronously to a clock signal of the PWM controller and also asserts the PWM control signal asynchronously to the clock signal.

Claims (28)

1. A method of forming a power supply controller comprising:

configuring a PWM controller to form a clock signal having a plurality of cycles with each cycle having a period; and

configuring the PWM controller to assert a PWM control signal a plurality of times within a cycle of the plurality of cycles including configuring the PWM controller to maintain a value of a ramp signal at a first value responsively to an error signal and to re-enable the ramp signal responsively to the error signal, wherein each assertion of the PWM control signal has a variable duty cycle and is used to drive a power switch.

2. The method of claim 1 wherein configuring the PWM controller to assert the PWM control signal the plurality of times within the cycle includes configuring the PWM controller to assert the PWM control signal synchronously to the clock signal within a first portion of the cycle and to assert the PWM control signal asynchronously to the clock signal within a second portion of the cycle.

3. The method of claim 2 wherein configuring the PWM controller to assert the PWM control signal synchronously to the clock signal within the first portion of the cycle and to assert the PWM control signal asynchronously to the clock signal within the second portion of the cycle includes configuring the PWM controller to pause the ramp signal of the PWM controller at a first value within the first portion of the cycle and to re-enable the ramp signal within the second portion of the cycle.

4. The method of claim 3 wherein configuring the PWM controller to pause the ramp signal of the PWM controller at the first value within the first portion of the cycle and to re-enable the ramp signal within the second portion of the cycle includes configuring the PWM controller to re-enable the ramp signal responsively to an error signal.

5. The method of claim 1 wherein configuring the PWM controller to assert the PWM control signal the plurality of times within the cycle includes configuring the PWM controller to assert the PWM control signal responsively to the clock signal within a first portion of the cycle, and configuring the PWM controller to assert the PWM control signal responsively to an error signal within a second portion of the cycle.

6. The method of claim 5 wherein configuring the PWM controller to assert the PWM control signal responsively to the clock signal within the first portion of the cycle includes configuring the PWM controller to pause the ramp signal at a first value and to re-enable the ramp signal responsively to the error signal reaching at least the first value.

7. The method of claim 6 wherein configuring the PWM controller to pause the ramp signal at the first value and to re-enable the ramp signal responsively to the error signal includes disabling a current source that is charging a capacitor and re-enabling the current source responsively to the error signal.

8. A method of forming a power supply controller comprising:

configuring a PWM controller to assert a PWM control signal a plurality of times within a cycle of a clock signal of the PWM controller;

configuring the PWM controller to maintain a value of a ramp signal at a first value responsively to an error signal and to re-enable the ramp signal responsively to the error signal; and

configuring the PWM controller to pause generating the ramp signal when the error signal reaches a value that is less than the first value and to re-enable the ramp signal when the error signal changes to a value that is substantially equal to the first value.

9. The method of claim 8 wherein configuring the PWM controller to assert the PWM control signal the plurality of times within the cycle includes disabling the PWM controller from charging a capacitor and re-enabling the PWM controller to charge the capacitor.

10. A power supply control method comprising:

operating a PWM controller synchronously to a clock signal for a first portion of a cycle of the clock signal and operating the PWM controller asynchronously to the clock signal for a second portion of the cycle wherein the clock signal controls generating a first cycle of a PWM control signal of the PWM controller and a ramp signal controls generating a second cycle of the PWM control signal and including pausing the ramp signal at a substantially constant value between the first cycle and the second cycle of the PWM control signal.

11. The method of claim 10 wherein operating the PWM controller synchronously to the clock signal for the first portion of the cycle of the clock signal and operating the PWM controller asynchronously to the clock signal for the second portion of the cycle includes asserting the PWM control signal synchronously to the clock signal within the first portion of the cycle and asserting the PWM control signal asynchronously to the clock signal within the second portion of the cycle.

12. The method of claim 11 wherein asserting the PWM control signal synchronously to the clock signal within the first portion of the cycle and asserting the PWM control signal asynchronously to the clock signal within the second portion of the cycle includes asserting the PWM control signal synchronously to the clock signal, negating the PWM control signal responsively to an error signal reaching a first value and asserting the PWM control signal responsively to the error signal reaching a second value.

13. The method of claim 11 wherein operating the PWM controller synchronously to the clock signal for the first portion of the cycle of the clock signal and operating the PWM controller asynchronously to the clock signal for the second portion of the cycle includes pausing a ramp signal at a first value within the first portion of the cycle and re-enabling the ramp signal within the second portion of the cycle.

14. The method of claim 10 wherein operating the PWM controller synchronously to the clock signal for the first portion of the cycle of the clock signal and operating the PWM controller asynchronously to the clock signal for the second portion of the cycle includes asserting the PWM control signal responsively to an error signal reaching a first value.

15. The method of claim 10 wherein operating the PWM controller synchronously to the clock signal for the first portion of the cycle of the clock signal and operating the PWM controller asynchronously to the clock signal for the second portion of the cycle includes varying a value of a ramp signal within the first portion of the cycle responsively to the clock signal, maintaining the value of the ramp signal substantially constant within a second portion of the cycle responsively to an error signal, and varying the value of the ramp signal within a third portion of the cycle responsively to the value of the error signal.

16. The method of claim 15 wherein varying the value of the ramp signal within the third portion of the cycle includes varying the value of the ramp signal after the error signal reaches a second value that is established by the first value.

17. A power supply controller comprising:

a clock generator configured to generate a free running clock signal having a plurality of cycles with each cycle of the plurality of cycles having a period;

a PWM controller configured to assert a PWM control signal synchronously to a substantially fixed point within at least a first portion of the period of each cycle of the plurality of cycles; and

the PWM controller configured to assert the PWM control signal asynchronously to the fixed point within a second portion of each cycle of the plurality of cycles.

18. The power supply controller of claim 17 wherein the PWM controller configured to assert the PWM control signal asynchronously to the fixed point includes the PWM controller configured to re-assert the PWM control signal asynchronously to the fixed point subsequently to asserting the PWM control signal synchronously to the fixed point.

19. The power supply controller of claim 17 wherein the PWM controller is configured to assert the PWM control signal within the second portion of the cycle responsively to an error signal of the power supply controller.

Assignments (6)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 054090, FRAME 0617 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064081/0167 →
SECURITY INTEREST Recorded Oct 16, 2020
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION; ON SEMICONDUCTOR CONNECTIVITY SOLUTIONS, INC.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 054090/0617 →
RELEASE OF SECURITY INTEREST Recorded May 6, 2016
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT AND COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 038631/0345 →
RELEASE OF SECURITY INTEREST Recorded May 6, 2016
From: JPMORGAN CHASE BANK, N.A. (ON ITS BEHALF AND ON BEHALF OF ITS PREDECESSOR IN INTEREST, CHASE MANHATTAN BANK)
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 038632/0074 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2005
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 016183/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 16, 2004
From: STEELE, JEREMY F.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, L.L.C.
Reel/Frame 015807/0756 →