IP Library Granted Patent US 7,353,425
Granted Patent B2
US 7,353,425 · App. 10/941,706 · Granted Apr 1, 2008

Data processing circuit apparatus having a data transmission unit of redundant design

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Quick Facts
Patent No.
US 7,353,425
App. No.
10/941,706
Granted
Apr 1, 2008
Kind
B2
Abstract

The invention provides a circuit apparatus having a circuit core module ( 100 ), a controller processor unit ( 102 ) for driving and addressing the circuit core module ( 100 ) and a data transmission unit ( 103 a ) for transmitting data between the circuit core module ( 100 ) and at least one external circuit module ( 110 ), provision being made of at least one further data transmission unit ( 103 b - 103 n ) that is of redundant design with respect to the data processing unit ( 103 a ), a data stream being changed over between the circuit core module ( 100 ) and the data transmission units ( 103 a - 103 n ) of multiply redundant design by means of a first changeover unit ( 201 ) and a data stream being changed over between the data transmission units ( 103 a - 103 n ) of multiply redundant design and the at least one external circuit module ( 110 ) by means of a second changeover unit ( 202 ).

Claims (20)

1. Data processing circuit apparatus having:

a) a circuit core module;

b) a controller processor unit for driving and addressing the circuit core module;

c) a data transmission unit for transmitting data between the circuit core module and at least one external circuit module, wherein the circuit apparatus furthermore has:

d) at least one further data transmission unit that is of redundant design with respect to the data transmission unit;

e) a first changeover unit for changing over a data stream between the circuit core module and the data transmission units of multiply redundant design, wherein the first changeover unit is changed over by means of a first test mode signal; and

f) a second changeover unit for changing over a data stream between the data transmission units of multiply redundant design and the at least one external circuit module, wherein the second changeover unit is changed over by means of a second test mode signal.

2. Apparatus according to claim 1 , wherein the circuit core module has at least one memory unit.

3. Apparatus according to claim 1 , wherein the data transmission units of redundant design each have a data processing unit for processing data and for forwarding data streams from and to the circuit core module.

4. Apparatus according to claim 1 , wherein the data transmission units of redundant design each have a data interface unit for coupling the circuit core module to the at least one external circuit module.

5. Method for connecting a circuit core module to at least one external circuit module, having the following steps:

a) providing a controller processor unit;

b) driving the circuit core module by means of control data which are supplied by the controller processor unit via a control bus;

c) addressing the circuit core module by means of addressing data which are supplied by the controller processor unit via an address bus; and

d) transmitting data between the circuit core module and the at least one external circuit module by means of a data transmission unit,

wherein provision is made of at least one further data transmission unit that is of redundant design with respect to the data transmission unit, a data stream being changed over between the circuit core module and the data transmission units of multiply redundant design by means of a first changeover unit and a data stream being changed over between the data transmission units of multiply redundant design and the at least one external circuit module by means of a second changeover unit, wherein the first changeover unit is changed over by means of a first test mode signal and the second changeover unit is changed over by means of a second test mode signal.

6. Method according to claim 5 , wherein data are processed and forwarded from and to the circuit core module by means of a data processing unit provided in each of the data transmission units of redundant design.

7. Method according to claim 5 , wherein the circuit core module is coupled to the at least one external circuit module by means of a data interface unit provided in each of the data transmission units of redundant design.

8. Method according to claim 5 , wherein the at least one further data transmission unit that is of redundant design is selected with regard to a maximum data processing speed.

9. Method according to claim 5 , wherein the at least one further data transmission unit that is of redundant design is selected, during testing of the circuit core module, in a manner dependent on a test mode.

Assignments (3)
CHANGE OF NAME Recorded Dec 20, 2021
From: FACEBOOK, INC.
To: META PLATFORMS, INC.
Reel/Frame 058553/0802 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 15, 2010
From: INFINEON TECHNOLOGIES AG
To: QIMONDA AG
Reel/Frame 023853/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 8, 2004
From: THALMANN, ERWIN
To: INFINEON TECHNOLOGIES AG
Reel/Frame 015351/0281 →