IP Library Patent Application 10944238
Patent Application
App. No. 10/944,238

Fabrication of optical components using Si, SiGe, SiGeC, and chemical endpoint detection

Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US None
App. No.
10/944,238
Abstract

One embodiment of the present invention provides a system to facilitate using selective etching to form optical components on a circuit device. The system operates by receiving a substrate composed of a first material including a buffer layer composed of a second material. The system forms a sacrificial layer composed of a third material on the buffer layer. Next, the system forms an optical fiber core composed of a fourth material on the sacrificial layer. After the optical fiber core has been formed, the system performs an etching operation using a selective etchant to remove the sacrificial layer. The system also applies a cladding layer to the optical fiber core.

Claims (12)

1 - 15 . (Canceled).

16 . A method to facilitate integrating active components on a circuit device, wherein the circuit device includes an optical fiber core that was epitaxially grown, comprising;

receiving the circuit device;

etching a cavity into the circuit device, wherein the cavity passes through the optical fiber core; and

creating a device within the cavity, wherein the device is aligned with the optical fiber core and wherein the device is an active device or a passive device.

17 . The method of claim 16 , wherein etching the cavity includes etching into a buffer layer below the optical fiber core.

18 . The method of claim 16 , wherein etching the cavity includes etching into a substrate layer below the optical fiber core.

19 . The method of claim 18 , wherein the substrate layer includes a doped semiconductor region, whereby the doped semiconductor region can form part of the active device.

20 . The method of claim 16 , further comprising applying a metallization layer to the active device, whereby the metallization layer forms conduction paths for the active device.

21 . The method of claim 20 , wherein the metallization layer forms a mirror metallization.

22 . A method to facilitate self aligned connections, wherein creating a device includes creating a self-aligned device that is self-aligned to an external fiber.

23 - 43 . (Canceled).