Semiconductor nonvolatile memory device
View Patent ↗In a nonvolatile memory device, wherein, for example, data “1” is electrically charged, while data “0” is not electrically charged, and memory cells susceptible to charge loss are included, when data in the array 10 is count value of “1”>count value of “0”, write data is converted to thereby make “1” to “0” and “0” to “1”, leading to number of “1”<number of “0”, so that a statistical reliability of the data in the array 10 is improved. The data, which is converted and written, is converted in its polarity prior to the conversion when it is read.
1. A nonvolatile memory device comprising:
a memory cell array;
a writing unit for writing data in the array;
first and second counter units for respectively counting threshold increase data and threshold decrease data for write data with respect to the writing unit;
a comparison unit for comparing the count value of the first counter unit and the count value of the second counter unit;
a memory unit for memorizing a comparison result of the comparison unit; and
a data conversion unit for, determining whether or not a polarity of the write data is converted in accordance with information of the memory unit and outputting the data to the writing unit.
2. A nonvolatile memory device as claimed in claim 1 , wherein
the array is divided into a plurality of sub arrays, and
the memory unit memorizes the comparison result of the comparison unit corresponding to each sub array.
3. A nonvolatile memory device comprising:
a memory cell array;
a writing unit for writing data in the array;
a counter unit for incrementing (or decrementing) write data with respect to the writing unit in the case of threshold increase data and decrementing (or incrementing) the write data in the case of threshold decrease data;
a memory unit for memorizing a count result of the counter unit; and
a data conversion unit for determining whether or not a polarity of the write data is converted in accordance with information of the memory unit and outputting the data to the writing unit.
4. A nonvolatile memory device as claimed in claim 3 , wherein
the array is divided into a plurality of sub arrays, and
the memory unit memorizes the count result of the counter unit corresponding to each sub array.
5. A nonvolatile memory device comprising:
a memory cell array;
a writing unit for writing data in the array;
a plurality of counter units for respectively counting a plurality of multi-value data for setting voltages of memory cells to a plurality of threshold voltages;
a comparison unit for comparing respective count values of the plurality counter units;
a memory unit for memorizing a comparison result of the comparison unit; and
a data conversion unit for determining whether or not a polarity of write data is converted in accordance with information of the memory unit and outputting the data to the writing unit.
6. A nonvolatile memory device as claimed in claim 5 , wherein
the array is divided into a plurality of sub arrays, and
the memory unit memorizes the comparison result of the comparison unit corresponding to each sub array.
7. A nonvolatile memory device as claimed in claim 5 , wherein
an encoder and a decoder are respectively provided in an input portion and an output portion of the memory unit.
8. A nonvolatile memory device as claimed in claim 7 , wherein
the array is divided into a plurality of sub arrays, and
the memory unit memorizes the comparison result of the comparison unit corresponding to each sub array.
9. A nonvolatile memory device comprising:
a memory cell array;
a writing unit for writing data in the array;
first and second counter units for respectively counting write data with respect to memory cells, wherein MSB is 1, and write data with respect to the memory cells, wherein MSB is 0;
a comparison unit for comparing count values of the first and second counter units;
a memory unit for memorizing a comparison result of the comparison unit; and
a data conversion unit for determining whether or not a polarity of the write data is converted based on information of the memory unit and outputting the data to the writing unit.
10. A nonvolatile memory device as claimed in claim 9 , wherein
the array is divided into a plurality of sub arrays, and
the memory unit memorizes the comparison result of the comparison unit corresponding to each sub array.
11. A nonvolatile memory comprising:
a memory cell array;
a writing unit for writing data in the array;
a counter unit for counting data for setting voltages of memory cells to a maximum threshold voltage or data for setting the voltages of the memory cells to a minimum threshold voltage;
a comparison unit for comparing a count value of the counter unit and half a value of the total number of the memory cells in the array;
a memory unit for memorizing a comparison result of the comparison unit; and
a data conversion unit for determining whether or not a polarity of write data is converted in accordance with information of the memory unit and outputting the data to the writing unit.
12. A nonvolatile memory device as claimed in claim 11 , wherein
the array is divided into a plurality of sub arrays, and
the memory unit memorizes the comparison result of the comparison unit corresponding to each sub array.
13. A nonvolatile memory device comprising:
a memory cell array;
a writing unit for writing data in the array;
a counter unit for counting data for setting voltages of memory cells to a maximum threshold voltage or data for setting the voltages of the memory cells to a minimum threshold voltage, wherein MSB is 1 when a count value reaches half a value of a total number of the memory cells in the array;
a memory unit for memorizing the MSB of the counter unit; and
a data conversion unit for determining whether or not a polarity of write data is converted in accordance with information of the memory unit and outputting the data to the writing unit.
14. A nonvolatile memory device as claimed in claim 13 , wherein
the array is divided into a plurality of sub arrays, and
the memory unit memorizes the MSB of the counter unit corresponding to each sub array.
15. A nonvolatile memory device comprising:
a memory cell array;
a reading unit for reading data whose polarity is converted and written in memory cells;
a memory unit for memorizing data conversion information; and
a data conversion unit for restoring the data from the reading unit to data prior to the conversion in accordance with the data conversion information of the memory unit,
wherein the array is divided into a plurality of sub arrays, and the memory unit memorizes the data conversion information corresponding to each sub array.
16. A nonvolatile memory device comprising:
a memory cell array;
a writing unit for writing data in the array;
a memory unit for memorizing data conversion information; and
a data conversion unit for converting data in a memory cell subjected to the generation of “0” degeneracy or “1” degeneracy in accordance with the data conversion information and outputting the data to the writing unit,
wherein the array is divided into a plurality of sub arrays, and the memory unit memorizes the data conversion information corresponding to each sub array.
17. A nonvolatile memory device comprising:
a memory cell array;
a reading unit for reading data in the memory cell subjected to the generation of the “0” degeneracy or “1” degeneracy, which is written after conversion;
a memory unit for memorizing data conversion information; and
a data conversion unit for restoring the data from the reading unit to data prior to the conversion in accordance with the data conversion information of the memory unit,
wherein the array is divided into a plurality of sub arrays, and the memory unit memorizes the data conversion information corresponding to each sub array.
18. A nonvolatile memory device comprising:
a memory cell array;
a writing unit for writing data in the array;
a memory unit for memorizing an address and I/O of a memory cell where charge loss or charge gain is generated;
a comparison unit for comparing the address of the memory unit and an address inputted for writing the data in the array and outputting a comparison result together with information of the I/O; and
a data conversion unit for determining whether or not a polarity of write data is converted in accordance with the comparison result and the I/O information of the comparison unit and outputting the data to the writing unit.
19. A nonvolatile memory device comprising:
a memory cell array;
a writing unit for writing data in the array;
a memory unit for memorizing data of a memory cell where charge loss or charge gain is generated; and
a data conversion unit for determining whether or not a polarity of write data is converted in accordance with information of the memory unit and outputting the data to the writing unit,
wherein the array is divided into a plurality of sub arrays, and the memory unit memorizes the data of the memory cell, where the charge loss or the charge gain is generated, corresponding to each sub array.
20. A nonvolatile memory device comprising:
a memory cell array;
a reading unit for reading data of a memory cell subjected to the generation of the charge loss or charge gain, which is written after the conversion;
a memory unit for memorizing data conversion information; and
a data conversion unit for restoring the data from the reading unit to data prior to the conversion in accordance with the data conversion information of the memory unit,
wherein the array is divided into a plurality of sub arrays, and the memory unit memorizes the data conversion information corresponding to each sub array.