Patent Assignment
Reel/Frame 047855/0799
Assignment of Assignor's Interest
Recorded: 2018-10-11
Pages: 11
Assignor
PANASONIC CORPORATION
Executed: 2017-12-31
Assignee
CETUS TECHNOLOGIES INC.
303 TERRY FOX DRIVE, SUITE 300, OTTAWA, K2K 3J1, CANADA
Covered Properties
(64)
Semiconductor Memory Device
Patent:
6,118,723 →
Application:
09/326,230 →
Semiconductor Device
Patent:
6,181,633 →
Application:
09/433,684 →
Semiconductor Storage Device with Synchronized Selection of Normal and Redundant Columns
Patent:
6,219,285 →
Application:
09/433,696 →
Semiconductor Device
Patent:
6,295,243 →
Application:
09/449,566 →
Semiconductor device with dram and logic part integrated
Semiconductor Device
Semiconductor Memory Device
Semiconductor Device
Semiconductor Memory Device
Semiconductor Memory Device and Method of Manufacturing Semiconductor Device with Chip on Chip Structure
Semiconductor memory device in which bit lines connected to dynamic memory cells extend left and right of sense amplifier column
Semiconductor Memory Device with Bit Line Precharge Voltage Generating Circuit
Semiconductor Integrated Circuit
Level Shift Circuit Having Control Circuits for High Speed, Area Saving and Power Saving
Semiconductor Integrated Circuit Device
Semiconductor Memory Device and Semiconductor Integrated Circuit Device
Nonvolatile Semiconductor Memory Device and Writing Method Thereto
Semiconductor Nonvolatile Storage Device
Semiconductor Memory Device, and Semiconductor Device with the Semiconductor Memory Device and Logic Circuit Device Therein
Semiconductor Memory Device
Semiconductor Memory Device
Semiconductor Memory Device
Semiconductor Memory Test Device
Semiconductor Device Having Read and Write Operations Corresponding to Read and Write Row Control Signals
Semiconductor Integrated Circuit Device and Method for Testing the Same
Semiconductor Nonvolatile Memory Device
Semiconductor Memory Device
Semiconductor Memory Apparatus
Semiconductor Integrated Circuit Device Having a Common Dram Block Accessed by a Plurality of Logic Circuits
Semiconductor Integrated Circuit Device
Semiconductor Memory Device
Nonvolatile Semiconductor Memory Device
Non-Volatile Semiconductor Memory Device
Semiconductor Memory Device
Non-Volatile Semiconductor Memory Device and Method for Reading the Same
Semiconductor Nonvolatile Storage Device
Semiconductor Integrated Circuit
Semiconductor Integrated Circuit Device
Semiconductor Memory Device
Memory Circuit
Driving Method of Nonvolatile Memory and Nonvolatile Memory Used in the Same Method
Semiconductor Integrated Circuit Device
Semiconductor Integrated Circuit
Charge-Pump Circuit
Nonvolatile Semiconductor Memory for Storing Multivalued Data
Switch Circuits with the Ability to Control Latch-Up Due to a Parasitic Element
Semiconductor Memory Device, and Data Transmitting/Receiving System
Semiconductor Memory with a Circuit for Testing the Same
Semiconductor Memory Device
Semiconductor Memory
Semiconductor Storage Device
Charge Pump Circuit
Current or Voltage Measurement Circuit, Sense Circuit, Semiconductor Non-Volatile Memory, and Differential Amplifier
Semiconductor Memory Device
Semiconductor Device in Which a Plurality of Memory Macros Are Mounted, and Testing Method Thereof
Charge Pump Circuit, Semiconductor Memory Device, and Method for Driving the Same
Semiconductor Storage Device Incorporated into a System Lsi with Finer Design Rules
Semiconductor Memory Device
Non-Volatile Memory Control Device
Semiconductor Memory Device
Semiconductor Device
A Semiconductor Integrated Circuit for Fetching Read Data from a Ddr-Sdram Operating in Synchronization with a Clock
Semiconductor Memory Device
Charge Pump Circuit
Application:
13/052,569 →
Publication:
US 2011/0169557
Related Assignments
(1)
Other recorded transfers of the patents in this record — the chain of ownership.