IP Library Granted Patent US 7,203,117
Granted Patent B2
US 7,203,117 · App. 11/245,075 · Granted Apr 10, 2007

Semiconductor integrated circuit

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Quick Facts
Patent No.
US 7,203,117
App. No.
11/245,075
Granted
Apr 10, 2007
Kind
B2
Abstract

A fuse device and a program transistor are connected in series with each other. A flip-flop turns ON, in response to a start signal, the program transistor to start program of the fuse device. A 2-input NAND circuit outputs an end signal at a time point where change in a resistance value of the fuse device is increased to reach a predetermined level while monitoring change in the resistance value of the fuse device through change in a voltage at a junction point of the fuse device and the program transistor. The flip-flop turns OFF, in response to the end signal, the program transistor to automatically terminate the program of the fuse device. Thus, the resistance value of the fuse device is increased to the predetermined level in a minimum program time.

Claims (37)

1. A semiconductor integrated circuit comprising:

a fuse device in which at least part is blown by a current flowing in the fuse device during application of a program voltage and a resistance value thereof is increased;

a program transistor connected to the fuse device in series to form a series circuit, the series circuit being connected to a program power supply;

a program start circuit for turning ON, in response to a start signal, the program transistor and thereby starting program of the fuse device;

a program monitoring circuit for monitoring change in a resistance value of the fuse device through change in a voltage at a junction point of the fuse device and the program transistor and outputting an end signal at a time point where the resistance value of the fuse device is increased to reach a predetermined resistance value; and

a program end circuit for turning OFF, in response to the end signal, the program transistor and thereby terminating the program of the fuse device.

2. The semiconductor integrated circuit of claim 1 , wherein the fuse device has a two-layered structure including a polysilicon layer and a silicide layer or a single-layered structure of a metal layer.

3. The semiconductor integrated circuit of claim 1 , wherein the program start circuit has the function of determining, according to a program input, whether or not to start the program of the fuse device.

4. The semiconductor integrated circuit of claim 1 , wherein the program start circuit and the program end circuit include a flip-flop which is set by the start signal and reset by the end signal, and

wherein ON/OFF control of the program transistor is controlled according to an output of the flip-flop.

5. The semiconductor integrated circuit of claim 1 , wherein a voltage of the program power source is set to be higher than a voltage of an operation power source for operating a logic circuit constituting the program monitoring circuit.

6. The semiconductor integrated circuit of claim 5 , further comprising:

a logic circuit; and

an input/output circuit,

wherein the program power source serves in common as a power source of the input/output circuit and the operation power source serves in common as a power source of the logic circuit.

7. The semiconductor integrated circuit of claim 1 , further comprising:

a read transistor having a higher ON resistance than an ON resistance of the program transistor and provided so as to be in parallel to the program transistor and be connected with the fuse device in series;

a voltage detector for sensing a voltage at a junction point of the fuse device and the read transistor to check whether or not the fuse device is in a programmed state; and

a read control circuit for performing control so as to turn ON the read transistor during an OFF state of the program transistor.

8. The semiconductor integrated circuit of claim 7 , wherein the series circuit of the fuse device and the program transistor is so configured that the voltage at the junction point of the fuse device and the program transistor is reduced when a resistance value of the fuse device is increased, and

wherein an input threshold voltage of the voltage detector is set to be higher than an input threshold voltage of a logic circuit constituting the program monitoring circuit.

9. The semiconductor integrated circuit of claim 7 , wherein the series circuit of the fuse device and the program transistor is so configured that the voltage at the junction point of the fuse device and the program transistor is increased when a resistance value of the fuse device is increased, and

wherein an input threshold voltage of the voltage detector is set to be lower than an input threshold voltage of a logic circuit constituting the program monitoring circuit.

10. The semiconductor integrated circuit of claim 7 , wherein the voltage detector includes:

a reference resistance element,

a reference transistor having an ON resistance substantially equal to an ON resistance of the program transistor and connected with the reference resistance element in series to form a series circuit, the series circuit being connected to the program power source, and

a differential amplifier for amplifying a difference between a voltage at a junction point of the fuse device and the read transistor and a voltage at a junction point of the reference resistance element and the reference transistor, and

wherein the read control circuit has the function of turning ON the reference transistor as well as the read transistor.

11. The semiconductor integrated circuit of claim 10 , wherein the reference resistance element has a single-layered structure of polysilicon.

12. The semiconductor integrated circuit of claim 10 , wherein the reference resistance element has a resistance value which is higher than a resistance value of the fuse device in a non-programmed state and lower than a lowest expected resistance value of the fuse device in a programmed state.

13. The semiconductor integrated circuit of claim 1 , comprising a plurality of fuse cores,

wherein each of the plurality of fuse cores includes the fuse device, the program transistor and the program monitoring circuit,

wherein the program start circuit has the function of turning ON, in response to the start signal, the program transistor of each of the plurality of fuse cores, and

wherein the program end circuit has the function of turning OFF the program transistor of each of the plurality of fuse cores when all the respective program monitoring circuits of the plurality of fuse cores output the end signal.

14. The semiconductor integrated circuit of claim 1 , comprising a plurality of fuse modules,

wherein each of the plurality of fuse modules includes the fuse device, the program transistor, the program start circuit, the program monitoring circuit, and the program end circuit, and

wherein the start signal to be given to one of the plurality of fuse modules is the end signal output from one of the rest of the plurality of fuse modules.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2018
From: PANASONIC CORPORATION
To: CETUS TECHNOLOGIES INC.
Reel/Frame 047855/0799 →
CHANGE OF NAME Recorded Dec 11, 2017
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 044831/0898 →