integrating n-type and P-type metal gate transistors

1. A method comprising:

forming exposed first and second structures on first and second parts of a substrate;

removing the exposed first structure selectively to the exposed second structure to generate a first trench without masking the exposed second structure;

forming a first metal gate electrode within the first trench;

removing the exposed second structure to generate a second trench; and

forming a second metal gate electrode within the second trench.

2. The method of claim 1 wherein:

the exposed first and second structures each comprise polysilicon;

the first metal gate electrode comprises a first metal that fills the first trench and that is selected from the group consisting of Hf, Zr, Ti, Ta, and Al; and

the second metal gate electrode comprises a second metal that fills the second trench and that is selected from the group consisting of Ru, Pd, Pt, Co, Ni, TiAlN, and WCN.

3. The method of claim 2 wherein:

the exposed first structure comprises n-type polysilicon;

the exposed second structure comprises p-type polysilicon; and

the exposed first structure is removed selectively to the exposed second structure using an ammonium hydroxide etch.

4. The method of claim 3 wherein the ammonium hydroxide etch takes place below 40° C. and at a concentration of 2–29%.

5. The method of claim 4 wherein the exposed second structure is removed using a wet etch that comprises 20–30% TMAH at 60–90° C.

6. The method of claim 5 wherein sonication is used to remove the exposed first and second structures.

7. The method of claim 1 wherein the first metal gate electrode comprises:

a first metal that partially fills the first trench, that is 50 angstroms to 1000 angatroms thick, and that is selected from the group consisting of Hf, Zr, Ti, Ta, and Al; and

an easily polished metal that fills the first trench and that is selected from the group consisting of tungsten and aluminum; and

wherein the second metal gate electrode comprises a second metal that partially fills the second trench, and that is selected from the group consisting of Ru, Pd, Pt, Co, Ni, TiAlN, and WCN.

8. A process comprising:

forming an exposed n-type polysilicon structure on a first part of a substrate;

forming an exposed p-type polysilicon structure on a second part of a substrate;

removing the exposed n-type polysilicon structure selectively to the exposed p-type polysilicon structure to generate a first trench without masking the exposed p-type polysilicon structure:

depositing a first metal within the first trench;

removing the exposed p-type polysilicon structure to generate a second trench; and

depositing a second metal within the second trench.

9. The method of claim 8 wherein:

the first metal fills the first trench and is selected from the group consisting of Hf, Zr, Ti, Ta, and Al; and

the second metal fills the second trench and is selected from the group consisting of Ru, Pd, Pt, Co, Ni, TiAlN, and WCN.

10. The method of claim 9 wherein the exposed n-type polysilicon structure is removed selectively to the exposed p-type polysilicon structure using an ammonium hydroxide etch.

11. The method of claim 10 wherein the ammonium hydroxide etch takes place below 40° C. and at a concentration of 2–29%.

12. The method of claim 11 wherein the exposed p-type polysilicon structure is removed using a wet etch that comprises 20–30% TMAH at 60–90  C.

13. The method of claim 8 wherein the first metal partially fills the first trench and is 50 angstroms to 1000 angstroms thick, and further comprising depositing an easily polished metal on the first metal to fill the first trench.

14. The method of claim 13 wherein the easily polished metal is selected from the group consisting of tungsten and aluminum.

15. The method of claim 14 wherein the second metal only partially fills the second trench.

16. A process comprising: depositing an inter-layer dielectric on an n-type polysilicon structure and on a p-type polysilicon structure;

removing the inter-layer dielectric from the n-type polysilicon structure and from the p-type polysilicon structure to generate an exposed n-type polysilicon structure and an exposed p-type polysilicon structure;

removing the exposed n-type polysilicon structure selectively to the exposed p-type polysilicon structure to generate a first trench without masking the exposed p-type polysilicon structure;

depositing a first metal that partially fills the first trench and that is 50 angstroms to 1000 angstroms thick;

depositing an easily polished metal on the first metal to fill the first trench;

removing the exposed p-type polysilicon structure to generate a second trench; and

depositing a second metal that partially fills the second trench.

17. The method of claim 16 wherein:

the first metal is selected from the group consisting of Hf, Zr, Ti, Ta, and Al;

the easily polished metal is selected from the group consisting of tungsten and aluminum; and

the second metal is selected from the group consisting of Ru, Pd, Pt, Ca, Ni, TiAlN, and WCN.

18. The method of claim 16 wherein the exposed n-type polysilicon structure is removed selectively to the exposed p-type polysilicon structure using an ammonium hydroxide etch that takes place below 40° C. and at a concentration of 2–29%.

19. The method of claim 16 wherein the exposed p-type polysilicon structure is removed using a wet etch that comprises 20–30% TMAH at 60–90° C.