Method and apparatus for plating and polishing semiconductor substrate
View Patent ↗The present invention provides a method and apparatus that plates/deposits a conductive material on a semiconductor substrate and then polishes the same substrate. This is achieved by providing multiple chambers in a single apparatus, where one chamber can be used for plating/depositing the conductive material and another chamber can be used for polishing the semiconductor substrate. The plating/depositing process can be performed using brush plating or electro chemical mechanical deposition and the polishing process can be performed using electropolishing or chemical mechanical polishing. The present invention further provides a method and apparatus for intermittently applying the conductive material to the semiconductor substrate and also intermittently polishing the substrate when such conductive material is not being applied to the substrate. Furthermore, the present invention provides a method and apparatus that plates/deposits and/or polishes a conductive material and improves the electrolyte mass transfer properties on a substrate using a novel anode assembly.
1. An apparatus for electropolishing a conductive surface of a semiconductor wafer using a solution, comprising:
an assembly having a planar top surface; and
a plurality of fixed pads mounted on the planar top surface such that the plurality of fixed pads protrude from the top surface, wherein the fixed pads are pad strips that are attached on the planar top surface, each of the pad strips being substantially parallel to adjacent pad strips and extending to an edge of the planar top surface; and
a power source for applying a potential difference between the assembly and the conductive surface during electropolishing.
2. The apparatus of claim 1 , wherein the planar top surface is circular or donut shaped.
3. The apparatus of claim 1 , further comprising a reservoir to supply the solution to the pad strips.
4. The apparatus of claim 1 , wherein the fixed pads are disposed in radial fashion on the planar top surface.
5. The apparatus of claim 1 , wherein the planar top surface is exposed between the fixed pads.
6. The apparatus of claim 1 , wherein the assembly includes openings so that the solution is delivered through the openings towards the conductive surface during electropolishing.
7. The apparatus of claim 1 , further comprising a solution channel configured to deliver the solution to a gap between the top planar surface and the conductive surface during electropolishing.
8. The apparatus of claim 1 , wherein the assembly is adapted to rotate about a first axis.
9. The apparatus of claim 8 , wherein the wafer is adapted to rotate about a second axis.
10. An apparatus for electropolishing a conductive surface of a semiconductor wafer using a solution, comprising:
a wafer head assembly configured to hold the semiconductor wafer;
an electrode assembly having a planar top surface, the planar top surface positioned to face the conductive surface of the wafer held by the wafer head assembly;
a plurality of fixed pad strips mounted on the planar top surface such that the plurality of fixed pad strips protrude from the planar top surface, each of the fixed pad strips being substantially parallel to adjacent fixed pad strips and extending to an edge of the planar top surface; and
a power source for applying a potential difference between the electrode assembly and the conductive surface during electropolishing.
11. The apparatus of claim 10 , wherein the pad strips are formed of a nonconductive, porous material.
12. The apparatus of claim 10 , wherein the pad strips are disposed in radial fashion on the planar top surface.
13. The apparatus of claim 10 , wherein the electrode assembly is configured to polish the conductive surface of the wafer when at least one of the pad strips is in contact with the conductive surface of the wafer.
14. The apparatus of claim 10 , wherein the electrode assembly is configured to rotate about a first axis.
15. The apparatus of claim 10 , wherein the wafer head assembly is configured to rotate the wafer about a second axis.