Semiconductor device having silicon on insulator structure and method of fabricating the same

1. A semiconductor device comprising:

a first semiconductor substrate as a support substrate;

a second semiconductor substrate which is layered on a first insulating film layered on one main surface of said first semiconductor substrate;

a diffusion layer formed at least in a part of the surficial portion of said first semiconductor substrate on the side thereof in contact with said first insulating film; and

a substrate-contact-forming region from which a part of said second semiconductor substrate is removed;

wherein the diffusion layer and the second semiconductor substrate are electrically connected in two locations.

2. The semiconductor device according to claim 1 , further comprising:

a contact hole opened on said first semiconductor substrate so as to penetrate said first insulating film exposed in said substrate-contact-forming region; and

a support substrate interconnect disposed on said second semiconductor substrate so as to connect with said first semiconductor substrate through a contact configured by filling said contact hole with a conductive material.

3. The semiconductor device according to claim 2 , wherein said contact hole includes a first contact hole opened in the region of said first semiconductor substrate having said diffusion layer formed therein, and a second contact hole opened in the region of said first semiconductor substrate not having said diffusion layer formed therein.

4. The semiconductor device according to claim 3 , wherein said support substrate connection wiring includes a first support substrate interconnect connected to said contact configured in said first contact hole, and a second support substrate interconnect connected to said contact configured in said second contact hole.

5. A semiconductor device including silicon on insulator (SOI) structure, comprising:

a support substrate;

a wiring layer, formed on said support substrate;

an insulating layer formed on said support substrate and said wiring layer, said insulating layer being provided as a part of said SOI;

a semiconductor substrate formed as a part of said SOI on said insulating layer, said semiconductor substrate having a first element and a first external terminal thereon, said element and said external terminal being coupled to said wiring layer,

wherein said semiconductor substrate includes a second element and a second external terminal, said second element and external terminals being coupled to said wiring layer.

6. The semiconductor device according to claim 5 , further comprising a first plug coupled between said wiring layer and said first element and a second plug coupled between said wiring layer and said second element,

wherein said first and second elements and said first and second plugs are designed on the same line in a planar arrangement.

7. The device as claimed in claim 5 , wherein said wiring layer is a diffusion layer.

8. The device as claimed in claim 7 , wherein said first external terminal is a power source supply terminal.

9. The device as claimed in claim 8 , said device further comprising a conductive layer connected to said first element and coupled to said wiring layer.

10. The semiconductor device according to claim 9 ,

wherein said semiconductor substrate has a first hole, and

wherein said conductive layer is formed in said first hole.

11. The semiconductor device according to claim 10 , further comprising a plug configured in a second hole formed in said insulating layer, thereby said conductive layer being connected to said wiring layer through said plug.

12. The device as claimed in claim 7 , wherein said diffusion layer has a first diffusion region of a first conductivity type and a second diffusion region of a second conductivity type.