Silicon on insulator device and layout method of the same
A silicon on insulator (SOI) semiconductor device includes a wire connected to doped regions formed in an active layer of a SOl substrate. A ratio of the area of the wire to the doped region or a ratio of the area of contact holes formed on the wire to the doped region is limited to a predetermined value. When the ratio exceeds the predetermined value, a dummy doped region is added to prevent the device from being damaged during a plasma process.
1 . A method of forming a silicon on insulator device that includes a MOS transistor, the method comprising:
providing a silicon on insulator substrate having a semiconductor substrate and an active layer isolated from the semiconductor substrate by a buried oxide film;
forming a field oxide film in the active layer;
removing a portion of the field oxide film and a corresponding portion of the buried oxide film to form an opening to expose a portion of a surface of the semiconductor substrate; and
simultaneously forming a doped region in the exposed portion of the surface of the semiconductor substrate and a source and a drain region of the MOS transistor in the active layer.
2 . The method according to claim 1 , wherein the field oxide film is formed such that a bottom of the field oxide film reaches the buried oxide film.