IP Library Granted Patent US 7,586,758
Granted Patent B2
US 7,586,758 · App. 10/958,924 · Granted Sep 8, 2009

Integrated circuit stacking system

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,586,758
App. No.
10/958,924
Granted
Sep 8, 2009
Kind
B2
Abstract

The present invention stacks packaged integrated circuits into modules that conserve PWB or other board surface area. The present invention can be used to advantage with packages of a variety of sizes and configurations ranging from larger packaged base elements having many dozens of contacts to smaller packages such as, for example, die-sized packages such as DSBGA. In a preferred embodiment devised in accordance with the present invention, a base element CSP integrated circuit and a support element CSP integrated circuit are aggregated through a flex circuit having at least two conductive layers that are patterned to selectively connect the two CSP elements. A portion of the flex circuit connected to the support element is folded over the base element to dispose the support element above the base element while reducing the overall footprint. The flex circuit provides a thermal and electrical connection path between the module and an application environment such as a printed wiring board (PWB).

Claims (22)

1. A circuit module comprising:

a base element CSP microprocessor integrated circuit having upper and lower major surfaces and a set of contacts on the lower major surface;

a support element CSP memory integrated circuit having at least two major surfaces and comprising a set of contacts, the base element CSP microprocessor integrated circuit and the support element CSP memory integrated circuit being in a stacked disposition relative to each other;

a flex circuit comprising a first conductive layer disposed at a first conductive layer level of the flex circuit and a second conductive layer disposed at a second conductive layer level of the flex circuit, the first conductive layer level having base element flex contacts and the second conductive layer level having support element flex contacts, the base element flex contacts at the first conductive layer level being in contact with the set of contacts of the base element CSP microprocessor integrated circuit and the support element flex contacts at the second conductive layer level being in contact with the set of contacts of the support element CSP memory integrated circuit;

a heat transference element adhesively connected to the upper major surface of the base element CSP microprocessor integrated circuit, and the heat transference element is in thermal contact with a heat absorbing structure.

2. The module of claim 1 in which a plurality of vias transit between the first and second conductive layer levels of the flex circuit.

3. The module of claim 1 in which the flex circuit is flexible in certain areas and rigid in other areas.

4. The module of claim 1 in which one or more portions of the flex circuit are rigid.

5. The module of claim 1 in which the module has a set of module contacts.

6. The module of claim 1 in which the module contacts are in electrical contact with the base element flex contacts.

7. The module of claim 5 in which a first subset of the set of module contacts are in electrical contact with the base element flex contacts.

8. The module of claim 7 in which a second subset of the set of module contacts are in electrical contact with the support elements of the flex contacts.

9. The module of claim 5 in which the module contacts are in contact with first and second subsets of the set of contacts of the base element CSP microprocessor integrated circuit.

10. The module of claim 5 in which a selected subset of the module contacts are in electrical contact with first and second subsets of the set of contacts of the base element CSP microprocessor integrated circuit.

11. A circuit module comprising:

a base element CSP microprocessor integrated circuit comprising a set of contacts;

a first support element CSP memory integrated circuit comprising a set of contacts;

a second support element packaged integrated circuit, the first support element CSP memory integrated circuit and the second support elements packaged integrated circuit being stacked above the base element CSP microprocessor integrated circuit;

a flex circuit having a conductive layer level at which there is a first set of conductive areas selected ones of which are in contact with a first subset of the set of contacts of the base element CSP microprocessor integrated circuit and electrically connected to the set of contacts of the first support element CSP memory integrated circuit, and the flex circuit having at the conductive layer, level, a second set of conductive areas selected ones of which are in contact with a second subset of the set of contacts of the base element CSP microprocessor integrated circuit; and

a heat transference element between the base element CSP microprocessor integrated circuit and the first support element CSP memory integrated circuit, and the heat transference element is in thermal contact with a heat absorbing structure.

12. The module of claim 11 in which the flex circuit is flexible in certain areas and rigid in other areas.

13. The module of claim 11 in which one or more portions of the flex circuit are rigid.

Assignments (6)
MERGER Recorded Dec 27, 2015
From: OVID DATA CO. LLC
To: TAMIRAS PER PTE. LTD., LLC
Reel/Frame 037373/0481 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 2, 2012
From: ENTORIAN TECHNOLOGIES INC.
To: OVID DATA CO. LLC
Reel/Frame 029389/0672 →
MERGER Recorded Oct 25, 2012
From: ENTORIAN TECHNOLOGIES L.P.
To: ENTORIAN GP LLC
Reel/Frame 029195/0048 →
MERGER Recorded Oct 25, 2012
From: ENTORIAN GP LLC
To: ENTORIAN TECHNOLOGIES INC.
Reel/Frame 029195/0114 →
CHANGE OF NAME Recorded Jan 26, 2010
From: STAKTEK GROUP, L.P.
To: ENTORIAN TECHNOLOGIES L.P.
Reel/Frame 023848/0062 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 17, 2008
From: CADY, JAMES W.; WILDER, JAMES; ROPER, DAVID L.; RAPPORT, RUSSELL; WEHRLY, JAMES DOUGLAS; BUCHLE, JEFFREY ALAN
To: STAKTEK GROUP, L.P.
Reel/Frame 020819/0670 →