IP Library Assignment 023848/0062
Patent Assignment
Reel/Frame 023848/0062

Change of Name

Recorded: 2010-01-26 Pages: 8
Assignor
STAKTEK GROUP, L.P.
Executed: 2008-02-29
Assignee
ENTORIAN TECHNOLOGIES L.P.
4030 WEST BRAKER LANE, BUILDING 2-100, AUSTIN, TEXAS, 78759
Covered Properties (135)
Lead-On-Chip Integrated Circuit Apparatus
Patent: 5,448,450 →
Application: 07/783,737 →
High Density Lead-on-Package Fabrication Method and Apparatus
Patent: 5,484,959 →
Application: 07/990,334 →
Warp-Resistent Ultra-Thin Integrated Circuit Package Fabrication Method
Patent: 5,369,056 →
Application: 08/037,830 →
Ultra High Density Integrated Circuit Packages Method
Patent: 5,367,766 →
Application: 08/043,196 →
Ultra High Density Integrated Circuit Packages Method and Apparatus
Patent: 5,446,620 →
Application: 08/133,395 →
Ultra High Density Modular Integrated Circuit Package
Patent: 5,420,751 →
Application: 08/133,397 →
Ultra High Density Integrated Circuit Packages Method and Apparatus
Patent: 5,377,077 →
Application: 08/168,354 →
Warp-Resistent Ultra-Thin Integrated Circuit Package Fabrication Method
Patent: 5,369,058 →
Application: 08/206,301 →
Bus Communication System for Stacked High Density Integrated Circuit Packages
Patent: 5,455,740 →
Application: 08/206,829 →
Warp-Resistant Ultra-Thin Integrated Circuit Package
Patent: 5,581,121 →
Application: 08/280,968 →
Multi-Signal Rail Assembly with Impedance Control for a Three-Dimensional High Density Integrated Circuit Package
Patent: 5,561,591 →
Application: 08/289,468 →
Ultra High Density Integrated Circuit Packages Method and Apparatus
Patent: 5,566,051 →
Application: 08/298,544 →
Hermetically Sealed Ceramic Integrated Circuit Heat Dissipating Package Fabrication Method
Patent: 5,702,985 →
Application: 08/325,719 →
Hermetically Sealed Ceramic Integrated Circuit Heat Dissipating Package
Patent: 5,572,065 →
Application: 08/328,338 →
Lead-On-Chip Integrated Circuit Apparatus
Patent: 5,528,075 →
Application: 08/375,874 →
High Density Integrated Circuit Module with Complex Electrical Interconnect Rails
Patent: 5,592,364 →
Application: 08/377,578 →
Hermetically Sealed Integrated Circuit Lead-on Package Configuration
Patent: 5,804,870 →
Application: 08/380,541 →
Chip Stack and Method of Making Same
Patent: 5,612,570 →
Application: 08/421,801 →
Ultra High Density Integrated Circuit Packages
Patent: 5,550,711 →
Application: 08/436,902 →
Bus Communication System for Stacked High Density Integrated Circuit Packages with Trifurcated Distal Lead Ends
Patent: 5,479,318 →
Application: 08/440,500 →
Bus Communication System for Stacked High Density Integrated Circuit Packages with Bifurcated Distal Lead Ends
Patent: 5,493,476 →
Application: 08/445,848 →
Simulcast Standard Multichip Memory Addressing System
Patent: 36,229 →
Application: 08/510,729 →
Three-Dimensional Warp-Resistant Integrated Circuit Module Method and Apparatus
Patent: 5,801,437 →
Application: 08/514,294 →
Lead-On-Chip Integrated Circuit Apparatus
Patent: 5,654,877 →
Application: 08/516,848 →
Method of Manufacturing an Integrated Package Having a Pair of Die on a Common Lead Frame
Patent: 5,615,475 →
Application: 08/517,485 →
Bus Communication System for Stacked High Density Integrated Circuit Packages Having an Intermediate Lead Frame
Patent: 5,541,812 →
Application: 08/526,470 →
Integrated Circuit Package with Overlapped Die on a Common Lead Frame
Patent: 5,585,668 →
Application: 08/601,880 →
Warp-Resistent Ultra-Thin Integrated Circuit Package Fabrication Method
Patent: 5,864,175 →
Application: 08/644,491 →
Integrated Circuit Packages Having an Externally Mounted Lead Frame Having Bifurcated Distal Lead Ends
Patent: 5,978,227 →
Application: 08/645,319 →
Method of Manufacturing a High Density Integrated Circuit Module with Complex Electrical Interconnect Rails Having Electrical Interconnect Strain Relief
Patent: 5,778,522 →
Application: 08/650,721 →
Method of Manufacturing an Uktra-High Density Warp-Resistant Memory Module
Patent: 5,843,807 →
Application: 08/686,985 →
Ultra-High Density Warp-Resistant Memory Module
Patent: 5,828,125 →
Application: 08/758,839 →
Method of Forming a Hermetically Sealed Circuit Lead-on Package
Patent: 5,783,464 →
Application: 08/798,556 →
Apparatus and Method of Manufacturing a Warp Resistant Thermally Conductive Integrated Circuit Package
Patent: 5,945,732 →
Application: 08/815,537 →
Three-Dimensional Warp-Resistant Integrated Circuit Module Method and Apparatus
Patent: 5,895,232 →
Application: 08/888,850 →
Ultra High Density Integrated Circuit Packages
Patent: 6,049,123 →
Application: 08/935,380 →
Ultra High Density Integrated Circuit Packages
Patent: 6,025,642 →
Application: 08/937,200 →
Modular Panel Stacking Process
Patent: 5,869,353 →
Application: 08/971,499 →
Method of Making High Density Circuit Module
Patent: 5,960,539 →
Application: 09/021,744 →
Chip Stack and Method of Making Same
Patent: 6,180,881 →
Application: 09/073,254 →
Method of Manufacturing a Warp Resistant Thermally Conductive Circuit Package
Patent: 6,190,939 →
Application: 09/115,293 →
Clock Driver with Instantaneously Selectable Phase and Method for Use in Data Communication System
Patent: 6,282,210 →
Application: 09/133,297 →
Warp-Resistent Ultra-Thin Integrated Circuit Package Fabrication Method
Patent: 6,194,247 →
Application: 09/159,120 →
Stacked Micro Ball Grid Array Packages
Patent: 6,310,392 →
Application: 09/221,350 →
Method of Manufacturing a Surface Mount Package
Patent: 6,205,654 →
Application: 09/222,263 →
Universal Package and Method of Forming the Same
Patent: 6,222,737 →
Application: 09/298,664 →
Stackable Flex Circuit Ic Package and Method of Making Same
Patent: 6,323,060 →
Application: 09/305,584 →
High Density Integrated Circuit Module with Complex Electrical Interconnect Rails Having Electrical Interconnect Strain Relief
Patent: 6,288,907 →
Application: 09/343,432 →
Ultra High Density Integrated Circuit Packages
Patent: 6,168,970 →
Application: 09/434,534 →
Stackable Chip Package with Flex Carrier
Patent: 6,262,895 →
Application: 09/482,294 →
Csp Stacking Technology Using Rigid/Flex Construction
Patent: 6,437,433 →
Application: 09/535,641 →
Stackable flex circuit chip package and method of making same
Patent: 6,351,029 →
Application: 09/574,321 →
Chip stack with active cooling system
Patent: 6,236,565 →
Application: 09/594,363 →
Panel Stacking of Bga Devices to Form Three-Dimensional Modules
Patent: 6,404,043 →
Application: 09/598,343 →
Rambus Stakpak
Patent: 6,404,662 →
Application: 09/646,724 →
Stacking System and Method
Patent: 6,608,763 →
Application: 09/663,753 →
method of forming universal package
Patent: 6,360,433 →
Application: 09/664,938 →
Stackable Flex Circuit Ic Package and Method of Making Same
Patent: 6,426,549 →
Application: 09/706,015 →
High Density Integrated Circuit Module
Patent: 6,919,626 →
Application: 09/761,210 →
Publication: US 2001/0005042
Contact Member Stacking System and Method
Patent: 6,462,408 →
Application: 09/819,171 →
Publication: US 2002/0140074
Three-Dimensional Memory Stacking Using Anisotropic Epoxy Interconnections
Patent: 6,472,735 →
Application: 09/826,621 →
Publication: US 2001/0054758
Stackable Chip Package with Flex Carrier
Patent: 6,473,308 →
Application: 09/838,773 →
Publication: US 2001/0015487
Stackable Flex Circuit Chip Package and Method of Making Same
Patent: 6,426,240 →
Application: 09/888,785 →
Publication: US 2001/0035572
Stackable Flex Circuit Ic Package and Method of Making Same
Patent: 6,514,793 →
Application: 09/888,792 →
Publication: US 2002/0048849
Chip Stack with Differing Chip Package Types
Patent: 6,627,984 →
Application: 09/912,010 →
Publication: US 2003/0020153
Wide Data Path Stacking System and Method
Patent: 6,618,257 →
Application: 09/916,625 →
Panel Stacking of Bga Devices to Form Three-Dimensional Modules
Patent: 6,544,815 →
Application: 09/922,977 →
Publication: US 2001/0054770
Post in Ring Interconnect Using for 3-D Stacking
Patent: 6,573,460 →
Application: 09/957,190 →
Publication: US 2003/0051906
Retaining Ring Interconnect Used for 3-D Stacking
Patent: 6,573,461 →
Application: 09/957,373 →
Publication: US 2003/0051907
Chip Scale Stacking System and Method
Patent: 6,576,992 →
Application: 10/005,581 →
Csp Chip Stack with Flex Circuit
Patent: 7,081,373 →
Application: 10/016,939 →
Publication: US 2003/0111736
Panel Stacking of Bga Devices to Form Three-Dimensional Modules
Patent: 6,566,746 →
Application: 10/017,553 →
Publication: US 2002/0053728
Contact Member Stacking System and Method
Patent: 6,806,120 →
Application: 10/092,104 →
Publication: US 2002/0142515
Flexible Circuit Connector for Stacked Chip Module
Patent: 6,572,387 →
Application: 10/101,039 →
Publication: US 2002/0102870
Integrated Circuit Stacking System and Method
Patent: 6,940,729 →
Application: 10/136,890 →
Publication: US 2003/0081392
Method of Assembling a Stackable Integrated Circuit Chip
Patent: 6,660,561 →
Application: 10/202,185 →
Publication: US 2002/0185724
Chip Stack with Differing Chip Package Types
Patent: 6,908,792 →
Application: 10/263,859 →
Publication: US 2003/0025211
Panel Stacking of Bga Devices to Form Three-Dimensional Modules
Patent: 6,878,571 →
Application: 10/316,566 →
Publication: US 2003/0127746
Modularized Die Stacking System and Method
Patent: 7,485,951 →
Application: 10/435,192 →
Publication: US 2004/0000707
Flexible Circuit Connector for Stacked Chip Module
Patent: 7,066,741 →
Application: 10/449,242 →
Publication: US 2003/0203663
Memory Expansion and Chip Scale Stacking System and Method
Patent: 6,914,324 →
Application: 10/453,398 →
Publication: US 2004/0000708
Thin Scale Outline Package
Patent: 6,856,010 →
Application: 10/620,157 →
Publication: US 2004/0108584
Low Profile Chip Scale Stacking System and Method
Patent: 7,026,708 →
Application: 10/631,886 →
Publication: US 2004/0052060
Memory Expansion and Chip Scale Stacking System and Method
Patent: 6,955,945 →
Application: 10/709,732 →
Publication: US 2004/0197956
Reflection-Control System and Method
Patent: 6,992,501 →
Application: 10/800,816 →
Publication: US 2005/0200380
Memory Expansion and Integrated Circuit Stacking System and Method
Patent: 7,542,304 →
Application: 10/804,452 →
Publication: US 2005/0057911
Contact Member Stacking System and Method
Patent: 6,893,899 →
Application: 10/814,531 →
Publication: US 2004/0183206
Integrated Circuit Stacking System and Method
Patent: 6,956,284 →
Application: 10/814,532 →
Publication: US 2004/0183183
Stacked Module Systems and Methods
Patent: 7,371,609 →
Application: 10/836,855 →
Publication: US 2004/0201091
Low Profile Chip Scale Stacking System and Method
Patent: 7,094,632 →
Application: 10/873,847 →
Publication: US 2004/0229402
Stackable Flex Circuit Ic Package and Method of Making Same
Patent: 39,628 →
Application: 10/900,073 →
Pitch Change and Chip Scale Stacking System
Patent: 7,053,478 →
Application: 10/914,483 →
Publication: US 2005/0018412
Integrated Circuit Stacking System
Patent: 7,586,758 →
Application: 10/958,924 →
Publication: US 2005/0041403
Integrated Circuit Stacking System and Method
Patent: 7,335,975 →
Application: 10/958,934 →
Publication: US 2005/0041404
Memory Expansion and Chip Scale Stacking System and Method
Patent: 7,256,484 →
Application: 10/963,867 →
Publication: US 2005/0062144
Thin Module System and Method
Patent: 7,480,152 →
Application: 11/005,992 →
Publication: US 2006/0050496
Buffered Thin Module System and Method
Patent: 7,511,968 →
Application: 11/007,551 →
Publication: US 2006/0050497
Low Profile Stacking System and Method
Patent: 7,180,167 →
Application: 11/011,469 →
Publication: US 2005/0146031
Inverted Csp Stacking System and Method
Patent: 7,309,914 →
Application: 11/039,615 →
Publication: US 2006/0157842
Thin Module System and Method
Patent: 7,468,893 →
Application: 11/058,979 →
Publication: US 2006/0049500
High Capacity Thin Module System and Method
Patent: 7,324,352 →
Application: 11/068,688 →
Publication: US 2006/0050488
Pitch Change and Chip Scale Stacking System and Method
Patent: 7,202,555 →
Application: 11/074,026 →
Publication: US 2005/0146011
Memory Module System and Method
Patent: 7,606,040 →
Application: 11/077,952 →
Publication: US 2006/0203442
Module Thermal Management System and Method
Patent: 7,606,049 →
Application: 11/125,018 →
Publication: US 2006/0049502
Stacked Module Systems and Method
Patent: 7,033,861 →
Application: 11/131,812 →
Die Module System
Patent: 7,423,885 →
Application: 11/157,565 →
Publication: US 2006/0050498
Compact Module System and Method
Patent: 7,606,050 →
Application: 11/187,269 →
Publication: US 2006/0050592
Stacking System and Method
Patent: 7,495,334 →
Application: 11/197,267 →
Publication: US 2005/0280135
High Capacity Thin Module System
Patent: 7,443,023 →
Application: 11/231,418 →
Publication: US 2006/0091529
Leaded Package Integrated Circuit Stacking
Patent: 7,259,452 →
Application: 11/248,662 →
Publication: US 2007/0080470
Optimized Mounting Area Circuit Module System and Method
Patent: 7,542,297 →
Application: 11/255,061 →
Publication: US 2006/0050489
Stacked Module Systems and Methods
Patent: 7,310,458 →
Application: 11/258,438 →
Publication: US 2006/0108572
Flex Circuit Apparatus and Method for Adding Capacitance While Conserving Circuit Board Surface Area
Patent: 7,576,995 →
Application: 11/267,476 →
Publication: US 2007/0103877
Circuit Module with Thermal Casing Systems
Patent: 7,446,410 →
Application: 11/283,355 →
Publication: US 2006/0090102
Stacked Integrated Circuit Module
Patent: 7,508,058 →
Application: 11/330,307 →
Publication: US 2007/0170561
Flex Circuit Constructions for High Capacity Circuit Module Systems and Methods
Patent: 7,616,452 →
Application: 11/331,969 →
Publication: US 2006/0125067
Circuit Module Turbulence Enhacement Systems and Methods
Patent: 7,579,687 →
Application: 11/332,740 →
Publication: US 2006/0129888
Composite Core Circuit Module System and Method
Patent: 7,511,969 →
Application: 11/345,910 →
Publication: US 2007/0176286
Active Cooling Methods and Apparatus for Modules
Patent: 7,289,327 →
Application: 11/364,489 →
Publication: US 2007/0201208
Stacked Module Systems and Method
Patent: 7,323,364 →
Application: 11/411,185 →
Publication: US 2006/0263938
Memory Card and Method for Devising
Patent: 7,608,920 →
Application: 11/434,964 →
Publication: US 2007/0158802
Managed Memory Component
Patent: 7,508,069 →
Application: 11/436,946 →
Publication: US 2007/0159545
Managed Memory Component
Patent: 7,304,382 →
Application: 11/436,957 →
Publication: US 2007/0158800
Carrier Structure Stacking System and Method
Patent: 7,446,403 →
Application: 11/452,531 →
Publication: US 2007/0290312
Interposer Stacking System and Method
Patent: 7,375,418 →
Application: 11/452,532 →
Publication: US 2007/0290313
Stacking System and Method
Patent: 7,193,310 →
Application: 11/489,956 →
Publication: US 2006/0261461
Contrast Interposer Stacking System and Method
Patent: 7,573,129 →
Application: 11/533,743 →
Publication: US 2007/0290314
Circuit Module Having Force Resistant Construction
Patent: 7,417,310 →
Application: 11/556,124 →
Publication: US 2008/0122054
Stackable Micropackages and Stacked Modules
Patent: 7,468,553 →
Application: 11/682,643 →
Publication: US 2008/0093724
Buffered Memory Device
Patent: 7,508,723 →
Application: 11/753,460 →
Publication: US 2008/0291747
Split Core Circuit Module
Patent: 7,522,421 →
Application: 11/777,925 →
Publication: US 2007/0258217
Stacked Module Systems and Methods
Patent: 7,572,671 →
Application: 11/867,534 →
Publication: US 2008/0036068
High Capacity Thin Module System and Method
Patent: 7,606,042 →
Application: 11/869,644 →
Publication: US 2008/0030966
High Capacity Thin Module System and Method
Patent: 7,522,425 →
Application: 11/869,687 →
Publication: US 2008/0030972
High Capacity Thin Module System
Patent: 7,459,784 →
Application: 11/961,477 →
Publication: US 2008/0094803
Related Assignments (9)
Other recorded transfers of the patents in this record — the chain of ownership.
Merger Sep 28, 2012
From: ENTORIAN GP LLC
To: ENTORIAN TECHNOLOGIES INC.
Reel/Frame 029048/0636 →
Merger Sep 28, 2012
From: ENTORIAN TECHNOLOGIES L.P.
To: ENTORIAN GP LLC
Reel/Frame 029048/0376 →
Merger Oct 25, 2012
From: ENTORIAN GP LLC
To: ENTORIAN TECHNOLOGIES INC.
Reel/Frame 029195/0114 →
Merger Oct 25, 2012
From: ENTORIAN TECHNOLOGIES L.P.
To: ENTORIAN GP LLC
Reel/Frame 029195/0048 →
Change of Name Dec 2, 2012
From: DENSE-PAC MICROSYSTEMS, INC.
To: DPAC TECHNOLOGIES CORP.
Reel/Frame 029395/0945 →
Assignment of Assignor's Interest Dec 2, 2012
From: ENTORIAN TECHNOLOGIES INC.
To: OVID DATA CO. LLC
Reel/Frame 029389/0672 →
Corrective Assignment to Correct the State of Incorporation Within the Assignment Document Previously Recorded on Reel 011177, Frame 0921.Assignors Hereby Confirms the State of Incorporation Is Texas. Jun 27, 2013
From: STAKTEK CORPORATION
To: STAKTEK GROUP L.P.
Reel/Frame 030962/0142 →
Merger Dec 27, 2015
From: OVID DATA CO. LLC
To: TAMIRAS PER PTE. LTD., LLC
Reel/Frame 037373/0481 →
Assignment of Assignor's Interest Nov 10, 2023
From: KOLSTER, PETER RUDOLF; EVELEENS, CORNELIS PIETER
To: KOLSTER HOLDING BV; HORTEVE BREEDING BV
Reel/Frame 065521/0164 →