Semiconductor device having a HMP metal gate

1. A semiconductor device comprising:

a semiconductor substrate having an N-channel area and a P-channel area; and

an N-channel transistor and a P-channel transistor formed in said N-channel area and said P-channel area, respectively, said N-channel transistor and said P-channel transistor having respective gate electrodes each having a layered structure including a polysilicon film doped with impurities, a high-melting-point (HMP) metal silicide film, a HMP metal nitride film and a HMP metal film, wherein said HMP metal silicide film of said gate electrode of said P-channel transistor has a discontinuous film structure.

2. The semiconductor device according to claim 1 , wherein both said HMP metal silicide film and said HMP metal nitride film include a HMP metal same as the HMP metal in said HMP metal film.

3. The semiconductor device according to claim 1 , wherein said discontinuous structure includes a plurality of silicide particles having grain sizes of 5 to 30 nm.

4. The semiconductor device according to claim 3 , wherein most of gaps between adjacent said silicide particles are 2 to 80 nm.

5. The semiconductor device according to claim 1 , wherein said HMP metal silicide film, said HMP metal nitride film and said HMP metal film include a HMP metal selected from the group consisting of tungsten, cobalt, titanium, nickel and tantalum.

6. The semiconductor device according to claim 1 , wherein said impurities are boron ions.

7. The semiconductor device according to claim 1 , wherein said layered structure further includes a HMP metal silicide nitride film adjacent to said HMP metal silicide film having said discontinuous film structure, said HMP metal silicide nitride film including a HMP metal same as a HMP metal in said HMP metal silicide film.

8. The semiconductor device according to claim 1 , wherein said semiconductor device has a dual-gate structure.

9. A method for manufacturing a semiconductor device comprising the steps of:

forming a gate oxide film on a semiconductor substrate including an N-channel area and a P-channel area in pair;

depositing a silicon film including polysilicon or amorphous silicon on said gate oxide film;

doping a first portion of said silicon film in said P-channel area with P-type impurities at a dosage of 1×10 15 to 5×10 15 ions/cm 2 , and a second portion of said silicon film in said N-channel area with N-type impurities;

depositing a high-melting-point (HMP) metal silicide “having a discontinuous film structure” on said doped silicon film at a uniform deposition rate between said P-channel area and said N-channel area, said uniform deposition rate depositing said HMP metal silicide film to a thickness of 3 to 10 nm; and

forming N-channel transistor and P-channel transistor in said N-channel area and said P-channel area, respectively, said N-channel transistor and P-channel transistor having respective gate electrodes, said gate electrodes including said doped polysilicon film, said HMP metal silicide film, a HMP metal nitride film and a HMP metal film.

10. The method according to claim 9 , wherein said thickness is 5 to 7 nm.

11. The method according to claim 9 , further comprising, after said HMP metal silicide film depositing step, the step of heat treating said silicon film to convert said silicon film including amorphous silicon into a polysilicon film.

12. The method according to claim 9 , wherein said HMP metal silicide film depositing step is performed under a deposition pressure of 30 to 100 Pa.

13. The method according to claim 9 , wherein said doping step dopes said first portion of said silicon film at a dosage of not lower than 3×10 15 ions/cm 2 .

14. The method according to claim 9 , wherein said HMP metal silicide film, said HMP metal nitride film and said HMP metal film include a HMP metal selected from the group consisting of tungsten, cobalt, titanium, nickel and tantalum.

15. The method according to claim 9 , wherein said P-type impurities are boron ions.