Patent Assignment
Reel/Frame 032900/0568
Assignment of Assignor's Interest
Recorded: 2014-05-15
Pages: 133
Assignor
ELPIDA MEMORY, INC.
Executed: 2013-07-26
Assignee
PS4 LUXCO S.A.R.L.
208, VAL DES BONS MALADES, LUXEMBOURG, L-2121, LUXEMBOURG
Covered Properties
(300)
A semiconductor integrated circuit device and process for manufacturing the same
Patent:
6,238,961 →
Application:
09/487,599 →
Semiconductor device and method for manufacturing the same
Patent:
6,313,497 →
Application:
09/504,432 →
Semiconductor Device with Copper Wiring Connected to Storage Capacitor
Patent:
6,521,932 →
Application:
09/525,029 →
Semiconductor Integrated Circuit Device and the Process of Manufacturing the Same Having Poly-Silicon Plug, Wiring Trenches and Bit Lines Formed in the Wiring Trenches Having a Width Finer Than a Predetermined Size
Surface Mount-Type Package of Ball Grid Array with Multi-Chip Mounting
Patent:
6,388,318 →
Application:
09/563,455 →
Semiconductor Device Having a Capacitance Adjustment Section
Patent:
6,417,557 →
Application:
09/568,589 →
Semiconductor Device Having Signal Line Above Main Ground or Main Vdd Line, and Manufacturing Method Thereof
Patent:
6,445,018 →
Application:
09/569,945 →
Chip-Size Integrated Circuit Package Having Slits Formed in an Insulator Tape
Patent:
6,476,482 →
Application:
09/588,189 →
Semiconductor Intergrated Circuit Device and a Method of Manufacture Thereof
Patent:
6,621,110 →
Application:
09/592,648 →
Method of Forming a Misfet Device with a Bit Line Completely Surrounded by Dielectric
Patent:
6,287,914 →
Application:
09/640,013 →
Semiconductor Device and Manufacturing Method Thereof
Patent:
6,545,360 →
Application:
09/657,839 →
Semiconductor Device and Method of Manufacturing the Same
Patent:
6,518,627 →
Application:
09/658,408 →
Chip Scale Package in Which Layout of Wiring Lines Is Improved
Patent:
6,657,293 →
Application:
09/679,805 →
Dram Mos Field Effect Transistors with Thresholds Determined by Differential Gate Doping
Patent:
6,573,575 →
Application:
09/684,840 →
Method of Manufacture for Semiconductor Devices
Patent:
6,391,702 →
Application:
09/698,807 →
Process for Manufacture of Micro Electromechanical Devices Having High Electrical Isolation
Patent:
6,617,657 →
Application:
09/710,326 →
Semiconductor Device
Patent:
6,384,343 →
Application:
09/724,195 →
Semiconductor Memory Device with a Triple Well Structure
Manufacturing Method of Semiconductor Integrated Circuit Device
Semiconductor Capacitor Device
Semiconductor Integrated Circuit Device and Process for Manufacturing the Same
Method of Manufacturing Semiconductor Devices Utilizing Underlayer-Dependency of Deposition of Capacitor Electrode Film, and Semiconductor Device
Semiconductor Device and a Method of Manufacturing the Same
Semiconductor Integrated Circuit Device and the Method of Producing the Same
Semiconductor Device with Multilayer Conductive Structure Formed on a Semiconductor Substrate
Patent:
6,624,513 →
Application:
09/787,528 →
Semiconductor Device Having a Capacitor Structure Including a Self-Alignment Deposition Preventing Film
Method of Manufacturing Semiconductor Devices Utilizing Underlayer-Dependency of Deposition of Capacitor Electrode Film, and Semiconductor Device
Semiconductor Memory Production System and Semiconductor Memory Production Method
Semiconductor device manufacturing system and method of manufacturing semiconductor devices
Method of Manufacturing Semiconductor Device
Method of Dram
Method for Fabricating an Isolated Microelectromechanical System (Mems) Device Using an Internal Void
Semiconductor Device and Manufacture Method of That
Semiconductor Device and Method for Manufacturing the Same
Method for Constructing an Isolate Microelectromechanical System (Mems) Device Using Surface Fabrication Techniques
Semiconductor Device and Method for Its Manufacture
Semiconductor Memory Device Having Memory Cells Each Capable of Storing Three or More Values
Mems-Based Electrically Isolated Analog-to-Digital Converter
Semiconductor Device Including an Insulated Gate Field Effect Transistor and Method of Manufacturing the Same
Semiconductor Device and Its Manufacturing Method
Method for Fabricating an Isolated Microelectromechanical System Device
A Semiconductor Device Comprising Thin Film Transistor Comprising Conductive Film Having Tapered Edge
Semiconductor Device
Semiconductor Device
Method of Manufacturing Semiconductor Devices
Sense Amplifier Arrangement for Semiconductor Memory Device
Method of Appraising a Dielectric Film, Method of Calibrating Temperature of a Heat Treatment Device, and Method of Fabricating a Semiconductor Memory Device
Semiconductor Device
Method and Manufacturing a Semiconductor Device Having a Ruthenium or a Ruthenium Oxide
Semiconductor Device and Its Manufacturing Method
Method for Making Semiconductor Integrated Circuits
Method of Manufacturing a Semiconductor Device Having Signal Line Above Main Ground or Main Vdd Line
Semiconductor Device and Method of Fabricating the Same
Method of Removing Silicon Nitride Film Formed on a Surface of a Material with a Process Gas Containing a Higher-Order Fluorocarbon in Combination with a Lower-Order Fluorocarbon
Integrated Circuit Device with P-Type Gate Memory Cell Having Pedestal Contact Plug and Peripheral Circuit
Method of Manufacturing a Semiconductor Device Including a Gettering Operation
Semiconductor Device and a Method of Manufacturing the Same
Method of Manufacturing Semiconductor Device
Method of Manufacturing Semiconductor Devices Utilizing Underlayer-Dependency of Deposition of Capacitor Electrode Film, and Semiconductor Device
Semiconductor Device with Double Sidewall Spacer and Layered Contact
Semiconductor Device with Copper Wiring Connected to Storage Capacitor
Semiconductor Device Using Shallow Trench Isolation and Method of Fabricating the Same
Semiconductor Integrated Circuit Device
Semiconductor Device Having a Low-Resistance Gate Electrode
Memory-Module with an Increased Density for Mounting Semiconductor Chips
Method of Designing Semiconductor Integrated Circuit Device and Semiconductor Integrated Circuit Device Manufactured Using the Same
Semiconductor Device and Method of Fabricating the Same
Gate Electrode and Method of Fabricating the Same
Method of Manufacturing a Semiconductor Device
Method of Fabricating a Semiconductor Device Having a Decreased Concentration of Phosphorus Impurities in Polysilicon
Semiconductor Integrated Circuit Device and Process for Manufacturing the Same
Method for Manufacturing a Semiconductor Device Having a Layered Gate Electrode
Package for Mounting Semiconductor Device
Etching Method
Semiconductor Integrated Circuits
Semiconductor Integrated Circuit Device and Manufacturing Method Thereof
Semiconductor Device and Its Manufacturing Method
Semiconductor Integrated Circuit Device with Capacitor of Crown Structure and Method of Manufacturing the Same
Semiconductor Memory Device
Memory card and its manufacturing method
Application:
10/466,806 →
Publication:
US 2004/0090829
Vertical Misfet Manufacturing Method, Vertical Misfet, Semiconductor Memory Device Manufacturing Method, and Semiconductor Memory Device
Method for Semiconductor Device Manufacturing to Include Multistage Chemical Vapor Deposition of Material Oxide Film
Semiconductor Device with Multilayer Conductive Structure Formed on a Semiconductor Substrate
Semiconductor Device and Its Manufacturing Method
Ald Process for Capacitor Dielectric
Semiconductor Integrated Circuit Device and a Method of Manufacture Thereof
Method for Fabricating a Semiconductor Device Having a Tapered-Mesa Side-Wall Film
Semiconductor Device and Method of Producing the Same
Semiconductor Device Including Storage Capacitor
Wafer Polishing Method and Wafer Polishing Apparatus in Semiconductor Fabrication Equipment
Semiconductor Device Using Shallow Trench Isolation and Method of Fabricating the Same
Semiconductor Device and a Method of Manufacturing the Same
Semiconductor Integrated Circuit Device and the Process of Manufacturing the Same Having Poly-Silicon Plug, Wiring Trenches and Bit Lines Formed in the Wiring Trenches Having a Width Finer Than a Predetermined Size
Manufacturing Method of Semiconductor Device and Oxidization Method of Semiconductor Substrate
Manufacturing Method of Semiconductor Device
Semiconductor Device Capable of Adjusting Input Resistance Without Changing Input Terminal Capacitance
A Memory with Memory Cells That Include a Mim Type Capacitor with a Lower Electrode Made for Reduced Resistance at an Interface with a Metal Film
Semiconductor Integrated Circuit Device and Method of Manufacturing the Device
Method for Forming a Metal Oxide Film
Manufacturing Method of Semiconductor Device
Semiconductor Module in Which a Semiconductor Package Is Bonded on a Mount Substrate
Method of Manufacturing Semiconductor Device Having Nitride Film with Improved Insulating Properties
Method of Manufacturing Semiconductor Device Having Oxide Films with Different Thickness
Semiconductor Device and Its Manufacturing Method
A Semiconductor Device Including a Semiconductor Chip Formed on an Insulating Element Such as a Tape, and Including an Improved Insulating Arrangement
Semiconductor Device and Its Manufacturing Method
Semiconductor Device Having a Low-Resistance Gate Electrode
Method of Manufacturing Semiconductor Device
Heat Radiation Device for Memory Module
Semiconductor Device Having a Hmp Metal Gate
Semiconductor Device and Manufacturing Method Thereof
Manufacturing Method of Semiconductor Device
Semiconductor Wafer and Dicing Method
Semiconductor Device Having Layered Chips
Method for Manufacturing a Semiconductor Device Having a Low Junction Leakage Current
Method for Forming a Trench Element Separation Region in a Semiconductor Substrate
Semiconductor Device Having Improved Solder Joint and Internal Lead Lifetimes
Semiconductor Device and Method of Manufacturing the Same
Method for Manufacturing a Semiconductor Device Having a W/Wn/Polysilicon Layered Film
Bga Semiconductor Device Having a Dummy Bump
Semiconductor Device and Method of Manufacturing the Same
Semiconductor Device and Method for Producing the Same
Method for Manufacturing a Semiconductor Device Having Polysilicon Plugs
Hemispherical Silicon Grain Capacitor with Variable Grain Size
Method of Manufacturing Semiconductor Device
Fine Pitch Grid Array Type Semiconductor Device
Semiconductor Device and Method of Manufacturing the Same
Semiconductor Integrated Circuit for High-Speed, High-Frequency Signal Transmission
Semiconductor Device Having a Bonding Pad Structure Including an Annular Contact
Phase-Change-Type Semiconductor Memory Device
Semiconductor Device Having a Mount Board
Semiconductor Memory Device
Semiconductor Device and a Method of Manufacturing the Same
Semiconductor Device and Method of Manufacturing the Same
Semiconductor Device, Manufacturing Method Thereof, and Connection Method of Circuit Board
Hard Mask Technique in Forming a Plug
Semiconductor Device Including a Plurality of Semiconductor Chips and a Plurality of Through-Line Groups
Semiconductor Device Having Cell Transistor with Recess Channel Structure
Semiconductor Device and Method for Manufacturing the Same
Semiconductor Memory Device and Manufacturing Method Thereof
Method for Manufacturing Semiconductor Storage Device Comprising a Slow Cooling Step
Method for Manufacturing Semiconductor Device
Semiconductor Device Including Semiconductor Chip with Two Pad Rows
Stacked Semiconductor Package
Semiconductor Chip Having Island Dispersion Structure and Method for Manufacturing the Same
Semiconductor Device Having Trench-Gate Transistor with Parallel Channel Regions in Gate Trench.
Semiconductor Integrated Circuit and Semiconductor Device Having Multilayer Interconnection
Stacked Type Semiconductor Memory Device and Chip Selection Circuit
Method of Forming Dielectric Film and Capacitor Manufacturing Method Using the Same
Method of Manufacturing Semiconductor Device and Semiconductor Memory Device
Method for Manufacturing a Semiconductor Device Having a Nitrogen-Containing Gate Insulating Film
Semiconductor Apparatus
Production Management Method and Production Management System
Semiconductor Device and Manufacturing Method Thereof
Stacked Semiconductor Device
Method for Forming a Metal Oxide Film
Method for Manufacturing a Semiconductor Device Including a Memory Cell Array Area and Peripheral Circuit Area
Heat Radiation Device for Memory Module
Method of Manufacturing Semiconductor Device Using Alignment Mark and Mark Hole
Semiconductor Package with Bypass Capacitor
Method for Manufacturing a Semiconductor Device Including a Silicon Film
Film formation apparatus, precursor introduction method and film formation method
Application:
11/819,019 →
Publication:
US 2008/0020494
Semiconductor Device Having a Multi-Layered Semiconductor Substrate
Process for Manufacturing Semiconductor Device
Variable Shaped Electron Beam Lithography System and Method for Manufacturing Substrate
Method of Manufacturing Semiconductor Devices
Semiconductor Device and Method of Forming the Same
Semiconductor Device Having a Mount Board
Semiconductor Device Having a Tapered Plug
Atomic layer deposition system including a plurality of exhaust tubes
Application:
12/010,149 →
Publication:
US 2008/0176412
Production Management Method and Production Management System
Semiconductor Memory Device and Method of Manufacturing the Same
Semiconductor Device and Method of Manufacturing the Same
Method of Manufacturing a Semiconductor Device Having Raised Source and Drain of Differing Heights
Semiconductor Device and a Method of Manufacturing the Same
Batch Deposition System Using a Supercritical Deposition Process
Application:
12/035,467 →
Publication:
US 2008/0206462
Semiconductor Device Manufacturing Method Having High Aspect Ratio Insulating Film
Dresser and Apparatus for Chemical Mechanical Polishing and Method of Dressing Polishing Pad
Method and Apparatus for Manufacturing a Semiconductor Device
Chip-Stacked Semiconductor Device and Manufacturing Method Thereof
Wiring Structure and Semiconductor Device, and Their Fabrication Methods
Focused Ion Beam Processing System and Method
Fine Resist Pattern Forming Method and Nanoimprint Mold Structure
Method of Manufacturing a Semiconductor Apparatus
Semiconductor Device and Method for Manufacturing Semiconductor Device
Cmp Apparatus and Method of Polishing Wafer Using Cmp
Method for Manufacturing Vertical Mos Transistor
Pattern Forming Method and Mask
Semiconductor Device Including a Semiconductor Chip Which Is Mounted Spaning a Plurality of Wiring Boards and Manufacturing Method Thereof
Semiconductor Device Including a First Land on the Wiring Substrate and a Second Land on the Sealing Portion
Semiconductor Device Including Antifuse Element
Implementation structure of semiconductor package
Application:
12/213,280 →
Publication:
US 2008/0308314
Method for Designing Dummy Pattern, Exposure Mask, Semiconductor Device, Method for Manufacturing Semiconductor Device, and Storage Medium
Stacked Memory Without Unbalanced Temperature Distributions
Semiconductor Device, Method for Manufacturing the Same, and Flexible Substrate for Mounting Semiconductor
Semiconductor Device Including Vertical Mos Transistors
Apparatus Including Column Having Hollow Part Filled with Filler and Solid Film-Formation Material
Method of Manufacturing a Semiconductor Device with Multilayer Sidewall
Method of Manufacturing Semiconductor Device Having Cell Transistor with Recess Channel Structure
Semiconductor Device Having Mos Transistors Which Are Serially Connected via Contacts and Conduction Layer
Semiconductor Device Having an Elevated Source/Drain Structure of Varying Cross-Section
Semiconductor Device and Manufacturing Method of the Same
Semiconductor Substrate Including First and Second Recognition Marks and Method for Manufacturing Semiconductor Device
Semiconductor Device and Method of Manufacturing the Same
Method of Manufacturing Semiconductor Device Including Mounting and Dicing Chips
Semiconductor Device
Semiconductor Device Including First Substrate Having Plurality of Wires and a Plurality of First Electrodes and a Second Substrae Including a Semiconductor Chip Being Mounted Thereon, and Second Electrodes Connected with First Electrodes of First Substrate
Semiconductor Module, Wiring Board , and Wiring Method
Semiconductor Device and Layout Method Thereof
Method for Manufacturing Semiconductor Device
Semiconductor Device
Semiconductor Device
Semiconductor Device and Method for Manufacturing the Same
Semiconductor Device
Module with Stacked Semiconductor Devices
Semiconductor Device Including Semiconductor Chips with Different Thickness
Wiring Board for Semiconductor Devices, Semiconductor Device, Electronic Device, and Motherboard
Semiconductor Device Having Improved Solder Joint and Internal Lead Lifetimes
Exposure Mask and Pattern Forming Method Therefor
Semiconductor Device and Manufacturing Method Therefor
Semiconductor Device and Method of Manufacturing the Same
Semiconductor Device and Manufacturing Method Therefor
Semiconductor Device Having Shield Structure
Semiconductor Device Including Semiconductor Chip and Sealing Material
Semiconductor Device and Method of Manufacturing the Same
Semiconductor Device Enabling Further Microfabrication
Method of Manufacturing a Semiconductor Device Having a Stacked Capacitor
Peel-Resistant Semiconductor Device with Improved Connector Density, and Method of Manufacturing the Same
Semiconductor Device and Method of Manufacturing a Semiconductor Device
Memory Module, Method for Using Same and Memory System
Semiconductor Memory Device and Manufacturing Method Thereof
Method of Manufacturing Semiconductor Device
Semiconductor Device Having a Contact Plug and Manufacturing Method Thereof
Semiconductor Device
Application:
12/564,933 →
Publication:
US 2010/0080032
Semiconductor Device and Method of Bonding Wires Between Semiconductor Chip and Wiring Substrate
Semiconductor Device and a Method of Manufacturing the Same
Semiconductor Device
Semiconductor Device and Method of Manufacturing the Same
Method of Manufacturing a Semiconductor Device Including Recessed-Channel-Array Mosfet Having a Higher Operational Speed
Method of Analyzing Thermal Stress According to Filling Factor of Filler in Resin
Semiconductor Device
Semiconductor Device and Manufacturing Method Thereof
Semiconductor Device Having Efficient Capacitor Arrangement
Semiconductor Device and Method of Forming Semiconductor Device
Intermediate Structure of Semiconductor Device and Method of Manufacturing the Same
Semiconductor Device and Manufacturing Method Thereof
Semiconductor Device and Manufacturing Method Thereof
Phase Shift Mask and Method for Manufacturing the Same, and Method for Manufacturing Integrated Circuit
Semiconductor Device
Semiconductor Device Having a Liquid Cooling Module
Semiconductor Device Stack with Bonding Layer and Wire Retaining Member
Solid-State Memory and Semiconductor Device
Semiconductor Device with Stacked Semiconductor Chips
Manufacturing Method of Semiconductor Memory Device
Inexpensive Electrode Materials to Facilitate Rutile Phase Titanium Oxide
Patent:
8,354,702 →
Application:
12/708,848 →
Semiconductor Device Including Stacked Semiconductor Chips
Bga Semiconductor Device Having a Dummy Bump
Stacked Semiconductor Device and Fabrication Method for Same
Device Having Gate with Two Buried Portions with Different Widths
Semiconductor Chip Having Island Dispersion Structure and Method for Manufacturing the Same
Semiconductor Device and a Method of Manufacturing the Same
Semiconductor Memory Device and Manufacturing Method Thereof
Chip-Stacked Semiconductor Device and Manufacturing Method Thereof
Chip-stacked semiconductor and manufacturing method thereof
Method of Manufacturing Semiconductor Device Including Sequentially Forming First and Second Mask Material Layers and Forming a Dotted Photoresist Pattern on the Second Mask Material Layer
Semiconductor Device Including Stacked Semiconductor Chips
Method of Forming a Semiconductor Device
Semiconductor Device, Method of Forming Semiconductor Device, and Data Processing System
Semiconductor Device
Semiconductor Device with Respective Electrode Pad Rows and Respective External Electrodes Electrically Connected and Arranged in the Respective End Portions of the Substrate
Method of Manufacturing Semiconductor Device
Semiconductor Device Having Elevated Source and Drain
Semiconductor Device and Method of Manufacturing the Same
Devices with Covering Layer and Filler
Device and Manufacturing Method of the Same
A Semiconductor Device That Uses a Transistor for Field Shield
Semiconductor Device
Semiconductor and a Method of Manufacturing the Same
Semiconductor Device Having a First Conductive Member Connecting a Chip to a Wiring Board Pad and a Second Conductive Member Connecting the Wiring Board Pad to a Land on an Insulator Covering the Chip and the Wiring Board
Stacked Type Semiconductor Memory Device and Chip Selection Circuit
Semiconductor Device Manufacturing Method
Semiconductor Device Having Raised Source and Drain of Differing Heights
Application:
13/311,027 →
Publication:
US 2012/0074477
Semiconductor Device and Manufacturing Method Thereof
Semiconductor Device and a Method of Manufacturing the Same
Method of Manufacturing a Semiconductor Device
Semiconductor Device Enabling Further Microfabrication
Semiconductor Device Including Antifuse Element
Application:
13/448,096 →
Publication:
US 2012/0199943
Semiconductor Device with Stacked Semiconductor Chips
Semiconductor Device Including Semiconductor Chips with Different Thickness
Stacked Semiconductor Device and Fabrication Method for Same
Semiconductor Memory Device and Manufacturing Method Thereof
Semiconductor Device
Capacitor Insulating Film, Method of Forming the Same, Capacitor and Semiconductor Device Using the Capacitor Insulating Film
Application:
13/660,537 →
Publication:
US 2013/0045582
Semiconductor Device and Stacked Semiconductor Device
Semiconductor Device Including Stacked Semiconductor Chips
Semiconductor Device and Manufacturing Method Thereof
Semiconductor Device
Semiconductor Device and a Method of Manufacturing the Same
Semiconductor Device Stack with Bonding Layer and Wire Retaining Member
Semiconductor Device Manufacturing Method Having High Aspect Ratio Insulating Film
Patent:
45,361 →
Application:
14/068,785 →
Related Assignments
(8)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Dec 22, 2009
From: FUJII, SEIYA
To: ELPIDA MEMORY, INC.
Reel/Frame 023687/0936 →
Security Agreement
May 15, 2012
From: ELPIDA MEMORY, INC.
To: APPLE INC.
Reel/Frame 028209/0477 →
Security Agreement
Jul 29, 2013
From: PS4 LUXCO S.A.R.L.
To: ELPIDA MEMORY INC.
Reel/Frame 032414/0261 →
Release of Security Interest
Feb 24, 2014
From: APPLE, INC
To: ELPIDA MEMORY, INC.
Reel/Frame 032331/0637 →
Change of Name
Aug 24, 2016
From: PS5 LUXCO S.A.R.L.
To: LONGITUDE SEMICONDUCTOR S.A.R.L.
Reel/Frame 039793/0880 →
Assignment of Assignor's Interest
Aug 24, 2016
From: PS4 LUXCO S.A.R.L.
To: PS5 LUXCO S.A.R.L.
Reel/Frame 039818/0506 →
Assignment of Assignor's Interest
Aug 21, 2018
From: LONGITUDE SEMICONDUCTOR S.A.R.L.
To: LONGITUDE LICENSING LIMITED
Reel/Frame 046865/0667 →
Assignment of Assignor's Interest
Aug 21, 2018
From: LONGITUDE SEMICONDUCTOR S.A.R.L.
To: LONGITUDE LICENSING LIMITED
Reel/Frame 046867/0248 →