Method for manufacturing a semiconductor device having a low junction leakage current
View Patent ↗A method for manufacturing a DRAM device includes the step of implanting phosphor at a specified dosage and heat treating the implanted phosphor for diffusion thereof to form source/drain regions, and implanting fluorine into the source/drain regions and heat treating the implanted fluorine for diffusion thereof. The resultant DRAM memory cell has a larger data storage capability due to lower junction leakage current caused by vacancy type defects formed in the metallurgical junction between the source/drain regions and the channel region.
1. A method for manufacturing a semiconductor device comprising:
implanting phosphorous into a semiconductor substrate at a specified dosage;
heat treating said implanted phosphorous for diffusion thereof to form source/drain regions;
implanting a halogen into said source/drain regions at a dosage of not higher than said specified dosage after said heat treating of said implanted phosphorous; and
heat treating said implanted halogen for diffusion thereof.
2. The method according to claim 1 , wherein said specified dosage in between 1×10 13 /cm 2 and 3×10 13 /cm 2 .
3. The method according to claim 1 , wherein said halogen implanting accelerates said halogen at a specified acceleration energy that introduces said halogen at a depth smaller than a depth of said source/drain regions.
4. The method according to claim 1 , wherein said halogen implanting accelerates said halogen at a specified acceleration energy that introduces said halogen at a depth smaller than ½ depth of said source/drain regions.
5. The method according to claim 1 , wherein said implanted halogen heat treating is conducted at a temperature of 900 to 1000 degrees Celsius.
6. The method according to claim 1 , wherein said halogen comprises fluorine.
7. The method of claim 1 , wherein said specified dosage is 7×10 12 /cm 2 .
8. The method of claim 7 , wherein said implanting of said phosphorous is at an acceleration energy of between 15 keV and 20 keV.
9. The method of claim 1 , wherein said heat treating of said implanted phosphorous is conducted at a temperature of 1000 degrees Celsius.
10. The method of claim 9 , wherein said heat treating of said implanted phosphorous is conducted for ten seconds.
11. The method of claim 1 , wherein said halogen is implanted at a dosage of 7×10 12 /cm 2 .
12. The method of claim 1 , wherein said halogen is implanted at an acceleration energy of 10 keV.
13. The method of claim 1 , wherein said heat treating of said implanted halogen is conducted for ten seconds.
14. A method for manufacturing a semiconductor device comprising:
implanting phosphorous into a substrate at a specified dosage;
heat treating the implanted phosphorous to form source/drain regions; and
implanting a halogen into said source/drain regions at a dosage of not higher than said specified dosage.
15. The method of claim 14 , further comprising heat treating said implanted halogen.
16. The method of claim 15 , wherein said heat treating of said halogen is at a temperature between 900 to 1,000 degrees Celsius.
17. The method of claim 14 , wherein said halogen implanting introduces said halogen at a depth that is less than a depth of one of a source and drain region.
18. The method of claim 14 , wherein said halogen implanting introduces said halogen at a depth that is less than a one-half a depth of one of a source and drain region.
19. The method of claim 14 , wherein said halogen comprises fluorine.