IP Library Granted Patent US 8,054,643
Granted Patent B2
US 8,054,643 · App. 12/320,641 · Granted Nov 8, 2011

Semiconductor module, wiring board, and wiring method

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Quick Facts
Patent No.
US 8,054,643
App. No.
12/320,641
Granted
Nov 8, 2011
Kind
B2
Abstract

A semiconductor module includes a plurality of rectangular shaped semiconductor devices which are arranged in two rows such that each pair of adjacent semiconductor devices is in orientations differed by 90 degrees from each other. A plurality of wirings connect the semiconductor devices included in one of the two rows to the semiconductor devices included in the other row such that the semiconductor devices arranged in the same orientations are connected to each other.

Claims (26)

1. A semiconductor module, comprising:

a plurality of rectangular shaped semiconductor devices which are arranged in two rows such that each pair of adjacent semiconductor devices is in orientations differed by 90 degrees from each other; and

a plurality of wirings which couple the semiconductor devices included in one of the two rows to the semiconductor devices included in the other row such that the semiconductor devices arranged in the same orientations are coupled to each other without any coupling to semiconductor devices having different orientations.

2. The semiconductor module as claimed in claim 1 , wherein each of the wirings comprises a plurality of wiring lines connecting one semiconductor device to another semiconductor device, these wiring lines being provided to have equal lengths.

3. The semiconductor module as claimed in claim 1 , wherein the wirings are provided to connect the semiconductor devices belonging to one of the two rows and the semiconductor devices belonging to the other row alternately.

4. The semiconductor module as claimed in claim 1 , wherein the wirings are provided by a form of a multilayer wiring board.

5. A wiring method for a semiconductor module, said method comprising:

arranging a plurality of rectangular-shaped semiconductor devices in two rows such that each pair of adjacent semiconductor devices is in orientations differed by 90 degrees from each other; and

electrically connecting the semiconductor devices included in one of the two rows to the semiconductor devices included in the other row by using a plurality of wirings such that the semiconductor devices arranged in the same orientations are coupled to each other without any coupling to semiconductor devices having different orientations.

6. The wiring method as claimed in claim 5 , wherein the wirings comprises a plurality of wiring lines connecting one semiconductor device to another semiconductor device, these wiring lines being provided to have equal lengths.

7. The wiring method as claimed in claim 5 , wherein the wirings are provided to connect the semiconductor devices belonging to one of the two rows and the semiconductor devices belonging to the other row alternately.

8. The wiring method as claimed in claim 5 , wherein the wirings are provided by a form of a multilayer wiring board.

9. A wiring board for a semiconductor module, said wiring board comprising:

a region on which a plurality of rectangular-shaped semiconductor devices arranged in two rows such that each pair of adjacent semiconductor devices is in orientations differed by 90 degrees from each other; and

wirings which are used to couple the semiconductor devices included in one of the two rows to the semiconductor devices included in the other row such that the semiconductor devices arranged in the same orientations are coupled to each other without any coupling to semiconductor devices having different orientations.

10. The wiring board as claimed in claim 9 , wherein each of the wirings includes a plurality of wiring lines connecting one semiconductor device to another semiconductor device, these wiring lines being provided to have equal lengths.

11. The wiring board as claimed in claim 9 , wherein the wirings are provided to connect the semiconductor devices belonging to one of the two rows and the semiconductor devices belonging to the other row alternately.

12. The wiring board as claimed in claim 9 , wherein the wiring board comprises a multilayer wiring board.

13. The semiconductor module of claim 1 , wherein the semiconductor devices arranged in the two rows comprise identical devices, thereby interconnecting corresponding terminals in the same orientations in the other row forms substantially parallel wiring patterns in a diagonal region between terminals of two semiconductor devices in two rows.

14. The semiconductor module of claim 13 , wherein lengths of the wirings of a wiring group interconnecting semiconductor devices of the same orientation in the two rows are substantially equal in a symmetric manner relative to a center line between two interconnected semiconductor devices, the substantially equal lengths thereby reducing a signal-to-signal skew in the two interconnected semiconductor devices.

15. The semiconductor module of claim 1 , wherein the wiring groups interconnecting the semiconductor devices of the same orientation in the two rows thereby form a zigzag pattern.

16. The semiconductor module of claim 15 , wherein vias are used to connect terminals of the semiconductor devices to a wiring layer in a multilayer wiring board and wherein a first wiring layer is used for interconnecting one orientation and a second wiring layer is used for interconnecting the second orientation, the interconnections of the two orientations thereby forming crisscross patterns involving two different wiring layers.

17. The wiring board of claim 9 , wherein the semiconductor devices arranged in the two rows comprise identical devices, thereby interconnecting corresponding terminals in the same orientations in the other row forms substantially parallel wiring patterns in a diagonal region between the terminals.

18. The wiring board of claim 17 , wherein lengths of the wirings of a wiring group interconnecting semiconductor devices of the same orientation in the two rows are substantially equal in a symmetric manner relative to a center line between two interconnected semiconductor devices, the substantially equal lengths thereby reducing a signal-to-signal skew in the two interconnected semiconductor devices.

19. The wiring board of claim 9 , wherein the wirings interconnecting the semiconductor devices of the same orientation in the two rows thereby form a zigzag pattern.

20. The wiring board of claim 19 , wherein vias are used to connect terminals of the semiconductor devices to a wiring layer in a multi layer wiring board and wherein a first wiring layer is used for interconnecting one orientation and a second wiring layer is used for interconnecting the second orientation, the interconnections of the two orientations thereby forming crisscross patterns involving two different wiring layers.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2014
From: ELPIDA MEMORY, INC.
To: PS4 LUXCO S.A.R.L.
Reel/Frame 032900/0568 →
SECURITY AGREEMENT Recorded Jul 29, 2013
From: PS4 LUXCO S.A.R.L.
To: ELPIDA MEMORY INC.
Reel/Frame 032414/0261 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 30, 2009
From: TSUKADA, WATARU
To: ELPIDA MEMORY, INC.
Reel/Frame 022254/0804 →