Manufacturing method of semiconductor device

1. A manufacturing method of a semiconductor device comprising a memory selection MISFET formed on a main surface of a semiconductor substrate and a capacitor having a lower electrode electrically connected to one of source and drain of said memory cell selection MISFET, an upper electrode and a capacity insulation film provided between said lower electrode and said upper electrode, the method comprising the steps of:

forming said capacity insulation film;

forming said upper electrode film on said capacity insulation film;

forming an insulative upper electrode protective film having a same shape as said upper electrode film so as to be in contact with said upper electrode film; and

etching said upper electrode protective film and said upper electrode film into a shape of said upper electrode.

2. The manufacturing method of a semiconductor device according to claim 1 , wherein said capacity insulation film is a tantalum oxide film.

3. The manufacturing method of a semiconductor device according to claim 1 , wherein said upper electrode film is a ruthenium film.

4. The manufacturing method of a semiconductor device according to claim 1 , wherein said upper electrode film is a laminated film of a ruthenium film and a tungsten film.

5. The manufacturing method of a semiconductor device according to claim 4 , wherein said tungsten film is formed using spattering method.

6. The manufacturing method of a semiconductor device according to claim 1 , wherein said upper electrode protective film is formed using CVD method.

7. The manufacturing method of a semiconductor device according to claim 1 , wherein said upper electrode protective film is a tantalum oxide film.

8. The manufacturing method of a semiconductor device according to claim 7 , wherein said tantalum oxide film is formed by using pentaethoxy tantalum (Ta(OC 2 H 5 ) 5 ) and oxygen as material gas.

9. The manufacturing method of a semiconductor device according to claim 7 , wherein the formation of said tantalum oxide film comprises the first film formation step and the second film formation step, a film formation speed of which is higher than that of the first film formation step.

10. The manufacturing method of a semiconductor device according to claim 9 , wherein a film formation temperature of the first film formation step is lower than that of the second film formation step.

11. The manufacturing method of a semiconductor device according to claim 9 , wherein an oxygen flow rate of the first film formation step is smaller than that of the second film formation step.

12. The manufacturing method of a semiconductor device according to claim 9 , wherein a film formation temperature of the first film formation step is 350–400° C.

13. The manufacturing method of a semiconductor device according to claim 9 , wherein a film thickness formed in the first film formation step is 0.1–2nm.

14. A manufacturing method of a semiconductor device comprising a memory selection MISFET formed on a main surface of a semiconductor substrate and a capacitor having a lower electrode electrically connected to one of source and drain of said memory cell selection MISFET, an upper electrode and a capacity insulation film provided between said lower electrode and said upper electrode, the method comprising the steps of:

forming said capacity insulation film;

forming said upper electrode film on said capacity insulation film;

forming an upper electrode protective film as to be in contact with said upper electrode film; and

etching said upper electrode protective film and said upper electrode film into a shape of said upper electrode,

wherein said upper electrode protective film is formed without oxidation of said upper electrode film.

15. The manufacturing method of a semiconductor device according to claim 1 , wherein said upper electrode protective film is formed in an oxidation atmosphere.

16. The manufacturing method of a semiconductor device according to claim 1 , wherein said upper electrode protective film is formed at a temperature of equal to or lower than 500° C.

17. The manufacturing method of a semiconductor device according to claim 1 , wherein said upper electrode protective film is formed without using ozone.

18. A manufacturing method of a semiconductor device comprising a memory selection MISFET formed on a main surface of a semiconductor substrate and a capacitor having a lower electrode electrically connected to one of source and drain of said memory cell selection MISFET, an upper electrode and a capacity insulation film provided between said lower electrode and said upper electrode, the method comprising the steps of:

forming said capacity insulation film;

forming said upper electrode film on said capacity insulation film;

forming an upper electrode protective film so as to be in contact with said upper electrode film; and

etching said upper electrode protective film and said upper electrode film into a shape of said upper electrode,

wherein said upper electrode protective film is an aluminum oxide film.

19. The manufacturing method of a semiconductor device according to claim 18 , wherein said aluminum oxide film is formed using trimethyl aluminum (Al(CH 3 ) 3 ) and oxygen as material gas.

20. The manufacturing method of a semiconductor device according to claim 18 , wherein said aluminum oxide film is formed using trimethyl aluminum (Al(CH 3 ) 3 ) and ozone as material gas.

21. The manufacturing method of a semiconductor device according to claim 1 , wherein said etching processing step comprises the steps of:

applying photo resist, exposing said photo resist film to light and developing;

etching said upper electrode protective film with said photo resist film as a mask;

removing said photo resist film; and

etching said upper electrode film with said upper electrode protective film as a mask.