IP Library Granted Patent US 7,790,613
Granted Patent B2
US 7,790,613 · App. 12/021,113 · Granted Sep 7, 2010

Semiconductor device and method of manufacturing the same

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Quick Facts
Patent No.
US 7,790,613
App. No.
12/021,113
Granted
Sep 7, 2010
Kind
B2
Abstract

A semiconductor device includes: a semiconductor substrate; a memory cell selection transistor that is formed on the semiconductor substrate and has a source and a drain; a contact plug; a polysilicon interlayer film that is formed above the memory cell selection transistor and has a cylinder-shaped through-hole; and a storage capacity part that is formed in the through-hole and is connected to the source and the drain of the memory cell selection transistor via the contact plug, wherein a boundary between a bottom and a side wall of the through-hole has a curved surface.

Claims (24)

1. A method of manufacturing a semiconductor device comprising the steps of:

forming at least a polysilicon interlayer film above a memory cell selection transistor that is formed on a semiconductor substrate and has a contact plug connected to a source and a drain;

forming a cylinder-shaped through-hole in the polysilicon interlayer film to expose the contact plug and shaping a boundary surface between a bottom and a side wall of the through-hole into a curve; and

forming a storage capacity part in the inner side of the through-hole, the storage capacity part being connected to the contact plug,

wherein, in the step of forming the through-hole, the boundary surface between the bottom and the side wall of the through-hole is shaped in the curve by annealing the polysilicon interlayer film, in a hydrogen atmosphere or in an inert gas atmosphere.

2. The method according to claim 1 ,

wherein, in the step of forming the through-hole, the side wall of the through-hole is covered by a silicon nitride insulating film or a silicon oxide insulating film.

3. The method according to claim 2 ,

wherein the contact plug includes at least one of Ru, Ir, W or an alloy thereof.

4. A method of manufacturing a semiconductor device, the method comprising:

forming a contact plug that is connected to one of a source and a drain of a memory cell selection transistor that is formed over a semiconductor substrate;

forming a first insulating interlayer film that covers a top of the contact plug;

laminating a polysilicon interlayer film and a second insulating interlayer film over the first insulating interlayer film;

forming a through-hole that passes through the second insulating interlayer film and the polysilicon interlayer film, so that a top of the first insulating interlayer film is shown through the through-hole;

annealing the semiconductor substrate in a hydrogen-containing reduction atmosphere to cause migration in the polysilicon interlayer film, thereby causing that a lower portion of the side face of the polysilicon interlayer film is curved toward the center of the through-hole, the lower portion being positioned adjacent to the boundary between the side face of the through-hole and the top of the first insulating interlayer film;

forming a insulating film that covers a side face of the through-hole;

removing a portion of the first insulating interlayer film, the portion being in the through-hole, so that the top of the contact plug is shown through the through-hole;

forming a bottom electrode film of a storage capacitor in the through-hole, the bottom electrode film having a bottom which is connected to the top of the contact plug and a side face which is separated from the polysilicon interlayer film by the insulating film, the insulating film covering the side face of the through-hole, the side face of the bottom electrode film having a lower portion connected to the bottom of the bottom electrode film, the lower portion being curved along the curved lower portion of the side face of the polysilicon interlayer film;

forming a dielectric film that covers a surface of the bottom electrode film; and

forming a top electrode film, at least a part of the top electrode film being provided in the through-hole, the top electrode film being separated from the bottom electrode film by the dielectric film.

5. The method according to claim 4 , wherein forming the insulating film that covers the side face of the through-hole comprises covering the side face of the through-hole with one of a silicon nitride insulating film and a silicon oxide insulating film.

6. The method according to claim 4 , wherein the side face of the through-hole is covered by a silicon insulating film by a thermal oxidation treatment, and the contact plug is formed by at least one of Ru, Ir, W and an alloy thereof.

7. The method according to one of claims 4 to 6 , wherein, the first insulating interlayer film comprises a silicon nitride interlayer film, and the second insulating interlayer film comprises a silicon oxide interlayer film.

8. The method according to claim 7 , wherein, instead of annealing in a hydrogen atmosphere, annealing in an inert gas atmosphere at a temperature from 800° C. to 1100° C.

Assignments (4)
CHANGE OF NAME Recorded Aug 24, 2016
From: PS5 LUXCO S.A.R.L.
To: LONGITUDE SEMICONDUCTOR S.A.R.L.
Reel/Frame 039793/0880 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2016
From: PS4 LUXCO S.A.R.L.
To: PS5 LUXCO S.A.R.L.
Reel/Frame 039818/0506 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2014
From: ELPIDA MEMORY, INC.
To: PS4 LUXCO S.A.R.L.
Reel/Frame 032900/0568 →
SECURITY AGREEMENT Recorded Jul 29, 2013
From: PS4 LUXCO S.A.R.L.
To: ELPIDA MEMORY INC.
Reel/Frame 032414/0261 →