IP Library Granted Patent US 7,928,014
Granted Patent B2
US 7,928,014 · App. 11/812,423 · Granted Apr 19, 2011

Method for manufacturing a semiconductor device including a silicon film

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Quick Facts
Patent No.
US 7,928,014
App. No.
11/812,423
Granted
Apr 19, 2011
Kind
B2
Abstract

A method for manufacturing a semiconductor device includes: mounting a wafer having an exposed silicon nitride film, on an electrode received in a plasma chamber; dry-cleaning the chamber to remove reaction products accumulated on the wall and ceiling of the chamber, anisotropic-etching the silicon nitride film and an underlying silicon film for patterning; and removing the wafer from the chamber. The method repeats the treatment for a number of semiconductor wafers.

Claims (23)

1. A method for manufacturing a semiconductor device, comprising an etching treatment including for each wafer the consecutive steps of:

mounting a semiconductor wafer on an electrode received in a chamber of a plasma etching system, said semiconductor wafer including a first film covering a surface of said semiconductor wafer including a surface of a silicon film;

dry-cleaning an internal of said chamber such that an etch selectivity of said silicon film with respect to said first film is a specific value or above;

consecutively anisotropic-etching said first film and said silicon film on said wafer by using a specific plasma etching condition; and

removing said semiconductor wafer from said chamber after said anisotropic etching, said method repeating said etching treatment for a plurality of wafers,

wherein said dry-cleaning step applies a plasma excitation power to a coil associated with said chamber, and a bias power to said electrode, and achieves an etch selectivity of 100 or above for silicon with respect to silicon nitride, and said first film includes a silicon nitride film.

2. The method according to claim 1 , wherein said dry-cleaning step uses a process condition where said plasma excitation power is 400 watts or above, said bias power is between zero watt and 5 watts inclusive of both, a chamber pressure is 4.5 mTorr or above, a percent ratio of a flow rate of O 2 introduced in said chamber or O 2 and N 2 introduced in said chamber with respect to a flow rate of Cl 2 introduced in said chamber is 1.5% or above.

3. A method for manufacturing a semiconductor device comprising the consecutive steps of:

forming a gate oxide film on a surface of a semiconductor wafer;

consecutively forming polysilicon film, metallic film and insulator film on said gate oxide film;

anisotropic-etching said insulator film, metallic film and polysilicon film to form a gate electrode pattern;

forming a silicon nitride film on a substantially entire surface of said semiconductor wafer;

mounting said wafer on an electrode received in a chamber of a plasma etching system;

dry-cleaning an internal of said chamber;

anisotropic-etching said silicon nitride film in said chamber;

anisotropic-etching said silicon film in said chamber; and

removing said semiconductor wafer from said chamber.

4. The method according to claim 3 , wherein said method repeats said consecutive steps for a plurality semiconductor wafers.

5. The method according to claim 3 , wherein said metallic film includes at least one of metallic film without an additive, metal nitride film, and metal silicide film.

6. The method according to claim 3 , wherein said insulator film includes at least one of silicon oxide film and silicon nitride film.

7. The method according to claim 3 , wherein said dry-cleaning step applies a plasma excitation power to a coil associated with said chamber, and a bias power to said electrode, and achieves an etch selectivity of 100 or above for silicon with respect to silicon nitride.

8. The method according to claim 7 , wherein said dry-cleaning step uses a process condition where said plasma excitation power is 400 watts or above, said bias power is between zero watt and 5 watts inclusive of both, a chamber pressure is 4.5 mTorr or above, a percent ratio of a flow rate of O 2 introduced in said chamber or O 2 and N 2 introduced in said chamber with respect to a flow rate of Cl 2 introduced in said chamber is 1.5% or above.

9. The method according to claim 3 , wherein said dry-cleaning step etches said silicon nitride film in an etched depth of 1 nm or below.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2018
From: LONGITUDE SEMICONDUCTOR S.A.R.L.
To: LONGITUDE LICENSING LIMITED
Reel/Frame 046867/0248 →
CHANGE OF NAME Recorded Aug 24, 2016
From: PS5 LUXCO S.A.R.L.
To: LONGITUDE SEMICONDUCTOR S.A.R.L.
Reel/Frame 039793/0880 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2016
From: PS4 LUXCO S.A.R.L.
To: PS5 LUXCO S.A.R.L.
Reel/Frame 039818/0506 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2014
From: ELPIDA MEMORY, INC.
To: PS4 LUXCO S.A.R.L.
Reel/Frame 032900/0568 →
SECURITY AGREEMENT Recorded Jul 29, 2013
From: PS4 LUXCO S.A.R.L.
To: ELPIDA MEMORY INC.
Reel/Frame 032414/0261 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 19, 2007
From: OGINO, SATOSHI
To: ELPIDA MEMORY, INC.
Reel/Frame 019495/0772 →