Solid-state memory and semiconductor device
View Patent ↗A solid memory may include a recording layer including Ge, Sb and Te as major components. The recording layer may include a superlattice. The recording layer may include multi-layers each having a parent phase showing a phase transformation in solid-states, the phase transformation causing change in electrical property of the recording layer. The recording layer may include an Sb 2 Te 3 layer that includes at least one period of a first lamination of a first Te-atomic layer, a first Sb-atomic layer, a second Te-atomic layer, a second Sb-atomic layer, and a third Te-atomic layer in these order, a GeTe layer that includes at least one period of a second lamination of a fourth Te-atomic layer and a Ge-atomic layer, and an Sb layer that includes a plurality of Sb-atomic layers.
1. A solid memory comprising:
a recording layer comprising Ge, Sb and Te as major components, the recording layer comprising a superlattice comprising multiple laminations, the recording layer comprising multi-layers showing a phase transformation in solid-states, the phase transformation causing change in electrical property of the recording layer,
the recording layer comprising:
an Sb 2 Te 3 layer that includes at least one period of a first lamination of a first Te-atomic layer, a first Sb-atomic layer, a second Te-atomic layer, a second Sb-atomic layer, and a third Te-atomic layer in these order;
a GeTe layer that includes at least one period of a second lamination of a fourth Te-atomic layer and a Ge-atomic layer; and
an Sb layer that includes a plurality of Sb-atomic layers.
2. The solid memory according to claim 1 , wherein the number of the plurality of Sb-atomic layers is not more than six and not less than three.
3. The solid memory according to claim 1 , wherein the multi-layers comprise laminations of the Sb 2 Te 3 layer, the GeTe layer, the Sb 2 Te 3 layer, and the Sb layer in these order.
4. The solid memory according to claim 1 , wherein the multi-layers comprise the Sb layer and alternating laminations of the Sb layer and the GeTe layer.
5. The solid memory according to claim 1 , wherein a thickness of each of the Sb 2 Te 3 layer, the GeTe layer and the Sb layer is between 0.1 nm and 2 nm.
6. The solid memory according to claim 1 , wherein in the first lamination, the first Sb-atomic layer is adjacent to the first Te-atomic layer, the second Te-atomic layer is adjacent to the first Sb-atomic layer, the second Sb-atomic layer is adjacent to the second Te-atomic layer, and the third Te-atomic layer is adjacent to the second Sb-atomic layer.
7. The solid memory according to claim 1 , wherein in the second lamination, the Te-atomic layer and the Ge-atomic layer are adjacent to each other.
8. The solid memory according to claim 1 , wherein the Sb 2 Te 3 layer and the GeTe layer are adjacent to each other.
9. The solid memory according to claim 1 , wherein a total amount of Ge, Sb and Te in the recording layer is equal to or more than 50 wt.-%.
10. A semiconductor device comprising:
a first electrode;
a second electrode; and
a recording layer which is sandwiched between the first and the second electrode, the recording layer comprising Ge, Sb and Te as major components, the recording layer comprising a superlattice comprising multiple laminations, the recording layer comprising multi-layers showing a phase transformation in solid-states, the phase transformation causing change in electrical property of the recording layer,
the recording layer comprising:
an Sb 2 Te 3 layer that includes at least one period of a first lamination of a first Te-atomic layer, a first Sb-atomic layer, a second Te-atomic layer, a second Sb-atomic layer, and a third Te-atomic layer in these order;
a GeTe layer that includes at least one period of a second lamination of a fourth Te-atomic layer and a Ge-atomic layer; and
an Sb layer that includes a plurality of Sb-atomic layers.
11. A solid memory comprising:
a recording layer comprising Ge, Sb and Te as major components,
the recording layer comprising multi-layers showing a phase transformation in solid-states, the phase transformation causing change in electrical property of the recording layer, the multi-layers forming a superlattice comprising multiple laminations,
the recording layer comprising an Sb 2 Te 3 layer and a GeTe layer adjacent to the Sb 2 Te 3 layer.
12. The solid memory according to claim 11 , further comprising: an Sb layer,
wherein the Sb 2 Te 3 layer includes at least one period of a first lamination of a first Te-atomic layer, a first Sb-atomic layer, a second Te-atomic layer, a second Sb-atomic layer, and a third Te-atomic layer in these order,
the GeTe layer includes at least one period of a second lamination of a fourth Te-atomic layer and a Ge-atomic layer, and
the Sb layer includes a plurality of Sb-atomic layers.
13. The solid memory according to claim 12 , wherein in the first lamination, the first Sb-atomic layer is adjacent to the first Te-atomic layer, the second Te-atomic layer is adjacent to the first Sb-atomic layer, the second Sb-atomic layer is adjacent to the second Te-atomic layer, the third Te-atomic layer is adjacent to the second Sb-atomic layer.
14. The solid memory according to claim 12 , wherein in the second lamination, the Te-atomic layer and the Ge-atomic layer are adjacent to each other.
15. The solid memory according to claim 11 , further comprising: an Sb layer,
wherein the multi-layers comprise laminations of the Sb 2 Te 3 layer, the GeTe layer, the Sb 2 Te 3 layer, and the Sb layer in these order.
16. The solid memory according to claim 11 , further comprising: an Sb layer,
wherein the multi-layers comprise the Sb layer and alternating laminations of the Sb layer and the GeTe layer.
17. A semiconductor device including a solid memory, the solid memory comprising:
a first electrode;
a second electrode; and
a recording layer which is sandwiched between the first and second electrode, having a recording state and an erasing state,
wherein the recording layer comprises a single crystalline structure both in the recording state and in the erasing state,
wherein the recording layer comprises Ge, Sb and Te as major components.