Method of manufacturing semiconductor device
View Patent ↗In a method of manufacturing a semiconductor device including a wiring pattern in the form of a linear line having an intermediate portion with a locally different line width, the wiring pattern being formed by using a resist pattern, the resist pattern is formed through an exposure step using a mask pattern prepared by dividing the wiring pattern in a mask into a simple line portion and a rectangular pattern portion having a different line width, and interposing between the line portion and the rectangular pattern portion a slit having a predetermined separation width of not larger than 0.22×λ/NA (λ represents a wavelength of exposure light, and NA represents a numerical aperture of a projection lens).
1. A method of manufacturing a semiconductor device including a wiring pattern in the form of a linear line having an intermediate portion with a locally different line width, the wiring pattern being formed by using a resist pattern, the method comprising:
forming the resist pattern through an exposure step using a mask pattern prepared by dividing the mask into a discontinuous pattern having a simple line portion and a separate rectangular pattern portion having a different line width, a first end of the simple line portion and a first side of the rectangular pattern portion being separated from one another by a slit having a predetermined separation width of not larger than 0.22 ×λ/NA,
wherein λ represents a wavelength of exposure light, and NA represents a numerical aperture of a projection lens; and
forming said wiring pattern having a continuous pattern of a simple line portion and a rectangular pattern portion, wherein:
the mask pattern further includes a bias pattern for correcting extreme narrowing of the pattern in a position of the mask layout where excessive light interference occurs, said bias pattern extending across said simple line portion and being spaced from said first end.
2. The method of manufacturing a semiconductor device according to claim 1 , wherein:
in the exposure step using the mask pattern, a line pattern and a slit pattern having the same shape in the resist pattern are selectively formed by selecting a positive-tone or a negative-tone resist process.
3. The method of manufacturing a semiconductor device according to claim 1 , wherein:
the portion having a different line width is a dog-bone portion.
4. The method of manufacturing a semiconductor device according to claim 1 , wherein:
the portion having a different line width is an angled portion.
5. The method of manufacturing a semiconductor device according to claim 1 , wherein
the line portion is a node portion.
6. A photomask used in manufacturing a semiconductor device including a continuous wiring pattern in the form of a linear line having an intermediate portion with a locally different line width, wherein:
the photomask has a mask pattern prepared by dividing the photomask into discrete portions including a simple line portion and a rectangular pattern portion having a different line width, and interposing between a first end of the line portion and a first side of the rectangular pattern portion a slit having a predetermined separation width of not larger than 0.22 ×λ/NA,
wherein λ represents a wavelength of exposure light., and NA represents a numerical aperture of a projection lens, wherein:
the mask pattern further includes a bias pattern for correcting extreme narrowing of the pattern in a position of a mask layout where excessive light interference occurs, said bias pattern extending across said simple line portion and being spaced from said first end.