IP Library Granted Patent US 7,454,189
Granted Patent B2
US 7,454,189 · App. 10/973,178 · Granted Nov 18, 2008

Calibration of received signal strength indication

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,454,189
App. No.
10/973,178
Granted
Nov 18, 2008
Kind
B2
Abstract

Calibration of received signal strength indication (RSSI) within a radio frequency integrated circuit (RFIC) begins by concurrently enables a transmitter portion and receiver portion. With both the transmitter and receiver enabled, the RFIC provides a zero input to the transmitter portion, where the zero input is an effective zero input based on the input circuitry of the transmitter portion. The RFIC then measures, via the receiver portion, the received signal strength of the RF signal generated by the transmitter portion regarding the zero input signal. The RFIC then compares the measured received signal strength with a desired zero input signal strength value. If the measured received signal strength compares unfavorably with the desired zero input signal strength value (e.g., differ by more than a few percentage points), the received signal strength to power level table within the RFIC, which is used to convert a measured voltage into a dBm value, is scaled based on the difference between the measured received signal strength and the desired zero input signal strength value.

Claims (45)

1. A method for calibrating received signal strength indication within a radio frequency integrated circuit (RFIC), the method comprises:

concurrently enabling a transmitter portion of the RFIC and a receiver portion of the RFIC;

providing a zero input to the transmitter portion, wherein the transmitter portion up converts the zero input via a mixer section to produce a radio frequency (RF) signal;

measuring received signal strength of the RF signal as received by the receiver portion while the transmitter portion and receiver portion are concurrent enabled to produce a measured received signal strength;

comparing the measured received signal strength with a desired zero-input signal strength value; and

when the measured received signal strength compares unfavorably to the desired zero-input signal strength value, scaling a received signal strength to power level table based on a difference between the measured received signal strength and the desired zero-input signal strength value.

2. The method of claim 1 , wherein the measuring the received signal strength of the RF signal further comprises:

sampling a received signal strength indication to produce a plurality of samples after expiration of a predetermined period of time to allow DC offset and local oscillation leakage correction circuits to settle; and

calculating the measured received signal strength from the plurality of samples.

3. The method of claim 1 further comprises:

determining whether the measured received signal strength is greater than the desired zero-input signal strength value;

when the measured received signal strength is greater than the desired zero-input signal strength value, scaling up values in the received signal strength to power level table; and

when the measured received signal strength is less than the desired zero-input signal strength value, scaling down values in the received signal strength to power level table.

4. An apparatus for calibrating received signal strength indication within a radio frequency integrated circuit (RFIC), the apparatus comprises:

processing module; and

memory operably coupled to the processing module, wherein the memory includes operational instructions that cause the processing module to:

concurrently enable a transmitter portion of the RFIC and a receiver portion of the RFIC;

provide a zero input to the transmitter portion, wherein the transmitter portion up converts the zero input via a mixer section to produce a radio frequency (RF) signal;

measure received signal strength of the RF signal as received by the receiver portion while the transmitter portion and receiver portion are concurrent enabled to produce a measured received signal strength;

compare the measured received signal strength with a desired zero-input signal strength value; and

when the measured received signal strength compares unfavorably to the desired zero-input signal strength value, scale a received signal strength to power level table based on a difference between the measured received signal strength and the desired zero-input signal strength value.

5. The apparatus of claim 4 , wherein the memory further comprises operational instructions that cause the processing module to measure the received signal strength of the RF signal by:

sampling a received signal strength indication to produce a plurality of samples after expiration of a predetermined period of time to allow DC offset and local oscillation leakage correction circuits to settle; and

calculating the measured received signal strength from the plurality of samples.

6. The apparatus of claim 4 , wherein the memory further comprises operational instructions that cause the processing module to:

determine whether the measured received signal strength is greater than the desired zero-input signal strength value;

when the measured received signal strength is greater than the desired zero-input signal strength value, scale up values in the received signal strength to power level table; and

when the measured received signal strength is less than the desired zero-input signal strength value, scale down values in the received signal strength to power level table.

7. A radio frequency integrated circuit (RFIC) comprises:

transmitter section operably coupled to convert outbound data into outbound radio frequency (RF) signals;

receiver section operably coupled to convert inbound RF signals into inbound data;

received signal strength indicator operably coupled to measure signal strength of the inbound RF signals to produce a measured signal strength; and

calibration module operably coupled to calibrate the measured signal strength by:

concurrently enabling the transmitter section and the receiver section;

providing a zero input to the transmitter section, wherein the transmitter section up converts the zero input via a mixer section to produce the outbound RF signal;

measuring received signal strength of the outbound RF signal as received by the receiver section while the transmitter section and receiver section are concurrent enabled to produce a measured received signal strength;

comparing the measured received signal strength with a desired zero-input signal strength value; and

when the measured received signal strength compares unfavorably to the desired zero-input signal strength value, scaling a received signal strength to power level table based on a difference between the measured received signal strength and the desired zero-input signal strength value.

8. The RFIC of claim 7 , wherein the measuring the received signal strength of the RF signal further comprises:

sampling a received signal strength indication to produce a plurality of samples after expiration of a predetermined period of time to allow DC offset and local oscillation leakage correction circuits to settle; and

calculating the measured received signal strength from the plurality of samples.

9. The RFIC of claim 7 , wherein the calibration module further functions to:

determine whether the measured received signal strength is greater than the desired zero-input input signal strength value;

when the measured received signal strength is greater than the desired zero-input signal strength value, scale up values in the received signal strength to power level table; and

when the measured received signal strength is less than the desired zero-input signal strength value, scale down values in the received signal strength to power level table.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERROR IN RECORDING THE MERGER PREVIOUSLY RECORDED AT REEL: 047357 FRAME: 0302. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 22, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048674/0834 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER PREVIOUSLY RECORDED ON REEL 047195 FRAME 0658. ASSIGNOR(S) HEREBY CONFIRMS THE THE EFFECTIVE DATE IS 09/05/2018. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047357/0302 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047195/0658 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →