IP Library Granted Patent US 7,394,310
Granted Patent B2
US 7,394,310 · App. 10/975,105 · Granted Jul 1, 2008

System and method for programmable switching characteristics of an analog switch in a transconductance amplifier

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Quick Facts
Patent No.
US 7,394,310
App. No.
10/975,105
Granted
Jul 1, 2008
Kind
B2
Abstract

Provided are a method and system for controlling impedance in a transconductance amplifier. A system includes a first transconductance amplifier and a second transconductance amplifier configured to control electrical characteristics associated with the first transconductance amplifier. An operational amplifier is provided and has at least one input port connected to the second transconductance amplifier. Also included is a first digital to analog converter (DAC) connected to receive a current signal from the operational amplifier.

Claims (24)

1. An apparatus, comprising:

a first transconductance amplifier; and

a calibration circuit including:

a second transconductance amplifier, the second transconductance amplifier including substantially structural replica circuit components of the first transconductance amplifier; and

an operational amplifier having an input port connected to the second transconductance amplifier and a digital to analog converter (DAC) connected to an output port of the operational amplifier, an output port of the DAC connected to an input port of the operational amplifier.

2. The apparatus of claim 1 , wherein the calibration circuit further includes an effects transistor having a source connected to an output port of the DAC and having its gate and drain connected together.

3. The apparatus of claim 1 , wherein the DAC produces a linear or a non-linear output.

4. A circuit, comprising:

a first transconductance amplifier;

a second transconductance amplifier configured to control electrical characteristics associated with the first transconductance amplifier, the second transconductance amplifier including substantially structural replica circuit components of the first transconductance amplifier;

an operational amplifier having at least one input port connected to the second transconductance amplifier; and

a first digital to analog converter (DAC) connected to receive a signal from the operational amplifier, the output port of the first DAC connected to an input of the operational amplifier.

5. The circuit of claim 4 , wherein the first transconductance amplifier includes a differential transistor pair; and a first switch transistor coupled across sources of the differential pair, a gate of the first switch transistor forming a control port.

6. The circuit of claim 4 , wherein the electrical characteristics include degeneration impedance.

7. The circuit of claim 4 , wherein the second transconductance amplifier includes a second switch transistor, a gate of the second switch transistor being devoid of an electrical connection.

8. The circuit of claim 7 , wherein the first and second switches are analog switches.

9. The circuit of claim 4 , wherein the degeneration impedance is programmable in time and voltage domains.

10. The circuit of claim 4 , wherein the electrical characteristics are facilitated when the DAC receives a digital input at a substantially given code value.

11. The circuit of claim 4 , further comprising an effects transistor having a source connected to an output port of the first DAC, a gate and a drain of the effects transistor being connected together.

12. The circuit of claim 5 , further comprising a second DAC configured to receive the signal from the operational amplifier; and wherein an output terminal of the second DAC is connected to the control port.

13. The circuit of claim 12 , wherein the second DAC is programmable.

14. The circuit of claim 12 , wherein the first and second DACs produce linear and non-linear outputs.

15. The circuit of claim 4 , wherein the second transconductance amplifier is configured to generate a threshold voltage.

16. The circuit of claim 4 , wherein a voltage created within the second transconductance amplifier is substantially replicated within the first transconductance amplifier.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERROR IN RECORDING THE MERGER PREVIOUSLY RECORDED AT REEL: 047357 FRAME: 0302. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 22, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048674/0834 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER PREVIOUSLY RECORDED ON REEL 047195 FRAME 0658. ASSIGNOR(S) HEREBY CONFIRMS THE THE EFFECTIVE DATE IS 09/05/2018. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047357/0302 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047195/0658 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 28, 2004
From: CHEN, CHUN-YING
To: BROADCOM CORPORATION
Reel/Frame 015937/0345 →