IP Library Granted Patent US 7,308,596
Granted Patent B1
US 7,308,596 · App. 10/975,219 · Granted Dec 11, 2007

Controlling a clock divider by selecting a preset value

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Quick Facts
Patent No.
US 7,308,596
App. No.
10/975,219
Granted
Dec 11, 2007
Kind
B1
Abstract

A method and apparatus for Clock and PLL N-Divider Switch have been disclosed.

Claims (11)

1. An apparatus comprising:

an input capable of receiving a control signal;

a first set of preset values;

a second set of preset values;

a selector having a control input, a first input, a second input, and an output, said control input in communication with said control signal, said first input in communication with said first set of preset values, said second input in communication with said second set of preset values;

a divider having a control input, an input, an output, said control input in communication with said selector output, said input in communication with a source, and said output in communication with a destination; and

wherein said first set of preset values and second set of preset values are stored in a memory selected from the group consisting of a LUT (look up table), a volatile memory, a previously loaded non-volatile memory, and a dynamically loaded memory.

2. The apparatus of claim 1 wherein said source is a reference clock and said destination is a circuit block containing a circuit element selected from the group consisting of a phase detector, a charge pump, and a VCO (voltage controlled oscillator).

3. The apparatus of claim 1 wherein said source is an output of a circuit block containing a circuit element selected from the group consisting of a phase detector, a charge pump, and a VCO, and said destination is an input of said circuit block.

4. The apparatus of claim 1 wherein said previously loaded non-volatile memory further comprises communicating a payment and/or credit.

5. A computer readable storage medium having stored thereon information representing the apparatus of claim 1 .

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Mar 29, 2019
From: JPMORGAN CHASE BANK, N.A.
To: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; CHIPX, INCORPORATED; ENDWAVE CORPORATION; MAGNUM SEMICONDUCTOR, INC.
Reel/Frame 048746/0001 →
SECURITY AGREEMENT Recorded Apr 5, 2017
From: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; MAGNUM SEMICONDUCTOR, INC.; ENDWAVE CORPORATION; CHIPX, INCORPORATED
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042166/0431 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 27, 2004
From: HWANG, FRANK; SHAN, GANG
To: INTEGRATED DEVICES TECHNOLOGY, INC.
Reel/Frame 015939/0892 →