IP Library Granted Patent US 7,292,827
Granted Patent B2
US 7,292,827 · App. 10/975,375 · Granted Nov 6, 2007

System and method for providing a single-ended receive portion and a differential transmit portion in a wireless transceiver

Assignee: Freescale Semiconductor, Inc.
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Quick Facts
Patent No.
US 7,292,827
App. No.
10/975,375
Granted
Nov 6, 2007
Kind
B2
Abstract

In an input/output circuit ( 200 ), a differential balun ( 250 ) is provided that has first and second balun inputs and first and second balun outputs. An antenna ( 230 ) is connected to the first and second balun outputs. A differential amplifier ( 220 ) has one output connected to the first balun input, and a second output connected to the second balun input, while a single-ended amplifier ( 110 ) has its input connected to the first balun input. A grounding switch ( 240 ) is connected between the second balun input and ground. During a transmit mode the grounding switch ( 240 ) is open, the differential amplifier ( 220 ) is turned on, and the single-ended amplifier ( 110 ) is turned off. During a receive mode the grounding switch ( 240 ) is closed, the differential amplifier ( 220 ) is turned off, and the single-ended amplifier ( 110 ) is turned on.

Claims (49)

1. An input/output circuit for a wireless transceiver, comprising:

a differential balun having first and second differential balun inputs and first and second differential balun outputs;

an antenna connected to the first and second differential balun outputs;

a differential transmitter amplifier having a first transmitter output connected to the first differential balun input, and a second transmitter output connected to the second differential balun input;

a single-ended receiver low noise amplifier having a receiver input connected to the first differential balun input; and

a grounding switch connected between the second differential balun input and ground,

wherein during a transmit mode the grounding switch is open, the differential transmitter amplifier is turned on, and the single-ended receiver low noise amplifier is turned off, and

wherein during a receive mode the grounding switch is closed and the differential transmitter amplifier is turned off, and the single-ended receiver low noise amplifier is turned on.

2. An input/output circuit for a wireless transceiver, as recited in claim 1 , wherein the antenna is unbalanced, the first differential balun output is connected to ground, and the second differential balun output is connected to a radiating surface of the antenna.

3. An input/output circuit for a wireless transceiver, as recited in claim 1 , wherein the antenna is balanced, the first differential balun output is connected to a first radiating surface of the antenna, and the second differential balun output is connected to a second radiating surface of the antenna.

4. An input/output circuit for a wireless transceiver, as recited in claim 1 , wherein the balun comprises first and second parallel signal lines formed in substantially concentric coils, the first parallel line being connected between the first differential balun input and the first differential balun output, and the second parallel line being connected between the second differential balun input and the second differential balun output.

5. An input/output circuit for a wireless transceiver, as recited in claim 4 , wherein a first separation between adjacent coils of the substantially concentric coils is at least four times a second separation between the first and second parallel signal lines.

6. An input/output circuit for a wireless transceiver, as recited in claim 4 , wherein a first impedance between the first and second parallel signal lines is at least 10 times lower than a second impedance between adjacent coils of the substantially concentric coils.

7. An input/output circuit for a wireless transceiver, as recited in claim 4 , wherein the impedance of the balun satisfies a set criteria for an operational frequency range.

8. An input/output circuit for a wireless transceiver, as recited in claim 7 , wherein the set criteria is to be above a set threshold impedance value.

9. An input/output circuit for a wireless transceiver, as recited in claim 1 , wherein the first transmitter output is a non-inverting output and the second transmitter output is an inverting output.

10. An input/output circuit for a wireless transceiver, as recited in claim 1 , wherein the second transmitter output is a non-inverting output and the first transmitter output is an inverting output.

11. An input/output circuit for a wireless transceiver, as recited in claim 1 , wherein the switch is formed in the differential transmitter amplifier.

12. An input/output circuit for a wireless transceiver, as recited in claim 1 , wherein the differential transmitter amplifier further comprises:

a first transistor connected between a source voltage and a first output node, the first transistor receiving a first control signal;

a second transistor connected between a source voltage and a second output node, the second transistor receiving a second control signal;

a third transistor connected between the first output node and ground, the third transistor receiving a third control signal; and

a fourth transistor connected between the second output node and ground, the fourth transistor receiving a fourth control signal,

wherein during a transmit mode the first through fourth control signals bias the first through fourth transistors, respectively, to a linear state, and

wherein during a receive mode the first through fourth control signals turn off the first through fourth transistors, respectively.

13. An input/output circuit for a wireless transceiver, as recited in claim 1 , wherein the differential transmitter amplifier further comprises:

a first transistor connected between a source voltage and a first output node, the first transistor receiving a first control signal;

a second transistor connected between a source voltage and a second output node, the second transistor receiving a second control signal;

a third transistor connected between the first output node and ground, the third transistor receiving a third control signal; and

a fourth transistor connected between the second output node and ground, the fourth transistor receiving a fourth control signal,

wherein the fourth transistor forms the grounding switch,

wherein during a transmit mode the first through fourth control signals bias the first through fourth transistors, respectively, to a linear state,

wherein during a receive mode the first through third control signals turn off the first through third transistors, respectively, and

wherein during a receive mode the fourth control signals turns on the fourth transistor.

14. An input/output circuit for a wireless transceiver, as recited in claim 1 , wherein the wireless transceiver is embodied in an integrated circuit.

15. An input/output circuit for a wireless transceiver, as recited in claim 1 , wherein the wireless transceiver is an ultrawide bandwidth transceiver.

16. A method of receiving and transmitting wireless signals in a transceiver having a differential transmitter, the differential transmitter comprising a differential balun connected between a differential transmitter amplifier and an antenna, the method comprising:

connecting a single-ended receiver low noise amplifier to a first differential input of the differential balun;

connecting a second differential input of the differential balun to ground,

isolating the differential transmitter amplifier from the differential balun;

receiving a wireless signal at the antenna, and passing the signal through the differential balun to the receiver low noise amplifier;

isolating the second differential input of the differential balun to ground; connecting the differential transmitter amplifier from the differential balun; and

transmitting the wireless signal from the differential transmitter amplifier through the differential balun to the antenna.

17. A method of receiving wireless signals, as recited in claim 16 , wherein the step of isolating the differential transmitter amplifier is performed by bringing its output nodes to a high impedance.

18. A method of receiving wireless signals, as recited in claim 16 , wherein the step of connecting the second differential input of the differential balun to ground is performed through the use of a switch connected between the second differential input of the differential balun and ground.

19. A method of receiving wireless signals, as recited in claim 18 , wherein the switch is a transistor switch.

20. A method of receiving wireless signals, as recited in claim 19 , wherein the transistor switch is contained in the differential transistor amplifier.

21. A method of receiving wireless signals, as recited in claim 16 , wherein the method is implemented in an integrated circuit.

22. A method of receiving wireless signals, as recited in claim 16 , wherein the method is implemented in an ultrawide bandwidth transceiver.

Assignments (30)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
PATENT RELEASE Recorded Aug 17, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 039707/0471 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NORTH STAR INNOVATIONS INC.
Reel/Frame 037694/0264 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0225 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024397/0001 →
SECURITY AGREEMENT Recorded Jul 11, 2008
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
Reel/Frame 021217/0368 →
SECURITY AGREEMENT Recorded Feb 2, 2007
From: FREESCALE SEMICONDUCTOR, INC.; FREESCALE ACQUISITION CORPORATION; FREESCALE ACQUISITION HOLDINGS CORP.; FREESCALE HOLDINGS (BERMUDA) III, LTD.
To: CITIBANK, N.A. AS COLLATERAL AGENT
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 29, 2004
From: MCCORKLE, JOHN W.
To: FREESCALE SEMICONDUCTOR INC.
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Continuity (1)
Related Publication 20060094357A1 · May 4, 2006