Baluns for multiple band operation
View Patent ↗A small size, low cost balun is formed on a substrate, such as gallium arsenide, as an integrated passive device. Multiple baluns are formed on a same substrate, allowing multi-band operation. For example, symmetrical transformers are provided for two different bands of operation, such as for a quad-band GSM application. Each of the two different baluns is used for two different frequency bands of operation of the quad-band device. A ground ring allows two Hi-Q baluns to be formed on the same integrated circuit side-by-side with minimum spacing and minimum impact on phase and amplitude performance over the frequency bands of operation. By using multiple integrated circuit baluns on a same substrate or chip, the size and cost of baluns for multi-band operation may be reduced.
1. An integrated circuit comprising:
a substrate;
a first balun that is operable in a first frequency band on the substrate;
a second balun that is operable in a second frequency band on the substrate, the second frequency band different than the first frequency band; and
an isolation line around at least part of each of the first and second baluns and at least in part between the first and second baluns in a circuit plane of the substrate.
2. The integrated circuit balun of claim 1 wherein the first and second baluns comprise symmetric Hi-Q resonant transformers.
3. The integrated circuit balun of claim 1 wherein the first balun is operable over a first frequency band, and the second balun is operable over a second frequency band, the second frequency band different than the first frequency band.
4. The integrated circuit balun of claim 3 wherein a first size of the first balun corresponds to the first frequency band, and a second size of the second balun corresponds to the second frequency band.
5. The integrated circuit balun of claim 3 wherein the first frequency band is a DCS band, PCS band or combinations thereof and the second frequency band is a Cellular band, EGSM band or combinations thereof.
6. The integrated circuit balun of claim 1 wherein the substrate comprises GaAs.
7. The integrated circuit balun of claim 1 wherein the substrate comprises silicon.
8. The integrated circuit balun of claim 1 further comprising a third balun adjacent to the first and second baluns.
9. The integrated circuit balun of claim 1 further comprising a ground trace between the first and second baluns.
10. The integrated circuit balun of claim 9 wherein the ground trace is around at least part of each of the first and second baluns.
11. The integrated circuit balun of claim 10 wherein the ground trace comprises at least first and second connected isolation rings, the first isolation ring around the first balun and the second isolation ring around the second balun.
12. The integrated circuit balun of claim 9 wherein the integrated circuit balun is free of a ground plane on the substrate.
13. The integrated circuit balun of claim 1 wherein a first edge of the first balun is within 100 microns of the second edge of the second balun.
14. The integrated circuit balun of claim 1 wherein the first balun comprises a first primary and a first secondary windings and the second balun comprises a second primary and a second secondary windings, further comprising a first capacitor connected with the first primary winding, a second capacitor connected with the first secondary winding, a third capacitor connected with the second primary winding and a fourth capacitor connected with the second secondary winding.
15. The integrated circuit balun of claim 1 further comprising at least a first tuning capacitor on the substrate and connected with the first balun.
16. The integrated circuit balun of claim 1 wherein the first and second baluns are electrically isolated from each other.
17. The integrated circuit balun of claim 1 wherein the first and second baluns have differential outputs, the differential outputs from the first balun do not connect to the differential outputs from the second balun.
18. The integrated circuit balun of claim 17 wherein the differential outputs from the first balun are associated with different frequency bands of operation than the differential outputs from the second balun.
19. The integrated circuit balun of claim 17 wherein the differential inputs from the first balun are associated with different frequency bands of operation than the differential inputs from the second balun.
20. The integrated circuit balun of claim 1 wherein the first and second baluns have differential inputs, the differential inputs from the first balun do not connect to the differential inputs from the second balun.
21. A method for transforming signals in different frequency bands, the method comprising:
(a) transforming a first signal at a first frequency band with a first integrated circuit balun;
(b) transforming a second signal at a second frequency band with a second integrated circuit balun, the first and second integrated circuit baluns being on a same substrate; and
(c) isolating the first integrated circuit balun from the second integrated circuit balun with an isolation trace on the substrate between the first and second integrated circuit baluns.
22. The method of claim 21 wherein (a) comprises transforming at a first mobile phone frequency band and (b) comprises transforming at a second mobile phone frequency band, the first mobile phone frequency band different than the second mobile phone frequency band.
23. Baluns for use at multiple frequency bands, the baluns comprising:
a first balun operable in a first frequency band, the first balun on a substrate;
a second balun operable in a second frequency band, the second frequency band different than the first frequency band, the second balun on the substrate; and
an isolation line around at least part of each of the first and second baluns and at least in part between the first and second baluns in a circuit plane of the substrate.
24. The baluns of claim 23 wherein the isolation line comprises a ground trace ring around and between the first and second baluns.
25. The baluns of claim 23 wherein the first and second baluns comprises symmetric Hi-Q transformers, each within 100 microns of the isolation line between the first and second transformers.
26. The baluns of claim 23 further comprising a capacitor on the substrate and connected with the first balun.