IP Library Granted Patent US 7,253,429
Granted Patent B2
US 7,253,429 · App. 10/981,826 · Granted Aug 7, 2007

Electrically programmable memory element

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,253,429
App. No.
10/981,826
Granted
Aug 7, 2007
Kind
B2
Abstract

A programmable resistance memory element including a memory material which is raised above a semiconductor substrate by a dielectric layer.

Claims (14)

1. An electrically operated memory element comprising:

a first dielectric layer having an opening therethrough;

a first conductive layer lining the sidewall surface of the opening of said first dielectric layer;

a second dielectric layer formed over said first conductive layer within said opening;

a second conductive layer formed over a top surface of said first conductive layer and a top surface of said second dielectric layer;

a third dielectric layer having an opening therethrough, at least portion of said opening of said third dielectric layer overlying said second dielectric layer; and

a programmable resistance material disposed in said opening and in electrical communication with said second conductive layer.

2. The memory element of claim 1 , wherein the resistivity of said second conductive layer is greater than the resistivity of said first conductive layer.

3. The memory element of claim 1 , wherein said first conductive layer is cup-shaped.

4. The memory element of claim 1 , wherein said programmable resistance material is a phase-change material.

5. The memory element of claim 1 , wherein substantially all of said opening of said third dielectric layer overlies said second dielectric layer.

6. The memory element of claim 1 , wherein said opening of said third dielectric layer is a hole.

7. The memory element of claim 1 , wherein said opening of said third dielectric layer is a hole, substantially all of said hole overlies said second dielectric layer.

8. The memory element of claim 1 , wherein said programmable resistance material comprises a chalcogenide material.

Assignments (2)
CHANGE OF NAME Recorded Jul 18, 2016
From: CARLOW INNOVATIONS, LLC
To: OVONYX MEMORY TECHNOLOGY, LLC
Reel/Frame 039379/0077 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 8, 2015
From: OVONYX, INC.
To: CARLOW INNOVATIONS LLC
Reel/Frame 037244/0954 →