IP Library Granted Patent US 8,207,604
Granted Patent B2
US 8,207,604 · App. 10/985,126 · Granted Jun 26, 2012

Microelectronic package comprising offset conductive posts on compliant layer

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,207,604
App. No.
10/985,126
Granted
Jun 26, 2012
Kind
B2
Abstract

A microelectronic package includes a mounting structure, a microelectronic element associated with the mounting structure, and a plurality of conductive posts physically connected to the mounting structure and electrically connected to the microelectronic element. The conductive posts project from the mounting structure in an upward direction, at least one of the conductive posts being an offset post. Each offset post has a base connected to the mounting structure, the base of each offset post defining a centroid. Each offset post also defines an upper extremity having a centroid, the centroid of the upper extremity being offset from the centroid of the base in a horizontal offset direction transverse to the upward direction. The mounting structure is adapted to permit tilting of each offset post about a horizontal axis so that the upper extremities may wipe across a contact pad of an opposing circuit board.

Claims (32)

1. A microelectronic package comprising:

a microelectronic element having a face and a plurality of contacts;

a mounting structure including a dielectric substrate assembled with said microelectronic element, said mounting structure including a compliant layer overlying said face; and

a plurality of posts physically connected with said dielectric substrate, said plurality of posts consisting essentially of copper and fully separated from said face of said microelectronic element by at least said compliant layer,

said plurality of posts having upper extremities projecting in an upward direction away from said face of said microelectronic element to a height above said mounting structure such that said upper extremities of said plurality of posts are available for engagement with corresponding contact pads of a circuit board when juxtaposed with said contact pads,

wherein said mounting structure further includes conductive traces physically connected with said dielectric substrate, said conductive posts being electrically connected with said contacts of said microelectronic element through said conductive traces,

at least one of said conductive posts being an offset post, the base of each said offset post defining a centroid, and the upper extremity of each said offset post defining a centroid, the centroid of the upper extremity being offset from the centroid of the base in a horizontal offset direction transverse to said upward direction.

2. The microelectronic package as claimed in claim 1 , wherein said mounting structure is adapted to permit tilting of each said offset post about a horizontal axis.

3. The microelectronic package as claimed in claim 1 , wherein said dielectric substrate is flexible.

4. The microelectronic package as claimed in claim 3 , wherein said flexible substrate is a generally sheet-like substrate extending substantially in a horizontal plane, said substrate having a top surface and a bottom surface, said posts projecting beyond said top surface in said upward direction.

5. The microelectronic package as claimed in claim 4 , wherein said substrate includes a plurality of gaps extending through the substrate and defining a plurality of regions, different ones of said posts being disposed on different ones of said regions.

6. The microelectronic package as claimed in claim 5 , wherein only one of said posts is disposed on each of said regions.

7. The microelectronic package as claimed in claim 4 , further comprising a plurality of support elements spaced apart from one another and disposed between said flexible substrate and said microelectronic element, wherein bases of said posts are spaced horizontally from said support elements.

8. The microelectronic package as claimed in claim 3 , wherein said conductive traces are formed on said flexible substrate.

9. The microelectronic package of claim 3 , wherein said compliant layer separates said flexible substrate from said face of said microelectronic element.

10. The microelectronic package as claimed in claim 1 , wherein said contacts are exposed at said face of said microelectronic element.

11. The microelectronic package as claimed in claim 1 , wherein said face is a first face of said microelectronic element, said microelectronic element further including a second face remote from said first face, wherein said contacts are exposed at said second face.

12. The microelectronic package of claim 1 , wherein each of the plurality of posts comprises a base capable of rotating, so as to allow said posts to move horizontally.

13. The microelectronic package of claim 1 , wherein said compliant layer further comprises a bottom surface adjacent said face of said microelectronic element, a top surface remote from said bottom surface, and an edge surface extending between said top and bottom surfaces,

wherein said traces extend along said edge surface and said top surface of said compliant layer to said posts.

14. The microelectronic package of claim 1 , wherein said compliant layer further comprises a bottom surface adjacent said microelectronic element and a top surface remote from said bottom surface,

wherein said conductive traces overlie said compliant layer and have a long dimension in a direction between said contacts of the microelectronic element and said posts.

15. The microelectronic package of claim 1 , further comprising a metal layer formed over an outer surface of the posts.

16. The microelectronic package of claim 15 , wherein the metal layer includes a layer of gold.

17. A microelectronic package comprising:

a microelectronic element having a face and a plurality of contacts;

a mounting structure including a dielectric substrate assembled with said microelectronic element, said mounting structure including a compliant layer overlying said face; and

a plurality of posts physically connected with said dielectric substrate, said plurality of posts consisting essentially of copper and fully separated from said face of said microelectronic element by at least said compliant layer, said posts projecting upwardly away from said mounting structure, each said post having a base supported above said face of said microelectronic element by said mounting structure and having an upper extremity remote from the microelectronic element, at least some of said posts having sharp features at or near their upper extremities such that said upper extremities of said plurality of posts are available for engagement with corresponding contact pads of a circuit board when juxtaposed with said contact pads,

wherein said mounting structure further includes conductive traces physically connected with said dielectric substrate, said conductive posts being electrically connected with said contacts of said microelectronic element through said conductive traces.

18. The microelectronic package as claimed in claim 17 , wherein at least some of said posts have tip surfaces extending oblique to the upward directions of the posts, said oblique surfaces at least partially defining the sharp features.

19. The microelectronic package of claim 17 , further comprising a metal layer formed over an outer surface of the posts.

20. The microelectronic package of claim 19 , wherein the metal layer includes a layer of gold.

Assignments (6)
CHANGE OF NAME Recorded Nov 21, 2025
From: TESSERA, INC.
To: TESSERA LLC
Reel/Frame 073657/0979 →
CHANGE OF NAME Recorded Nov 21, 2025
From: TESSERA LLC
To: ADEIA SEMICONDUCTOR SOLUTIONS LLC
Reel/Frame 073658/0661 →
RELEASE OF SECURITY INTEREST Recorded Jun 11, 2020
From: ROYAL BANK OF CANADA
To: TESSERA, INC.; INVENSAS BONDING TECHNOLOGIES, INC. (F/K/A ZIPTRONIX, INC.); FOTONATION CORPORATION (F/K/A DIGITALOPTICS CORPORATION AND F/K/A DIGITALOPTICS CORPORATION MEMS); INVENSAS CORPORATION; TESSERA ADVANCED TECHNOLOGIES, INC; DTS, INC.; DTS LLC; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
Reel/Frame 052920/0001 →
SECURITY INTEREST Recorded Jun 1, 2020
From: ROVI SOLUTIONS CORPORATION; ROVI TECHNOLOGIES CORPORATION; ROVI GUIDES, INC.; TIVO SOLUTIONS INC.; VEVEO, INC.; INVENSAS CORPORATION; INVENSAS BONDING TECHNOLOGIES, INC.; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: BANK OF AMERICA, N.A.
Reel/Frame 053468/0001 →
SECURITY INTEREST Recorded Dec 2, 2016
From: INVENSAS CORPORATION; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; ZIPTRONIX, INC.; DIGITALOPTICS CORPORATION; DIGITALOPTICS CORPORATION MEMS; DTS, LLC; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: ROYAL BANK OF CANADA, AS COLLATERAL AGENT
Reel/Frame 040797/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 25, 2005
From: HABA, BELGACEM; BEROZ, MASUD; HUMPSTON, GILES; PARK, JAE M.
To: TESSERA, INC.
Reel/Frame 016150/0261 →