IP Library Granted Patent US 6,982,184
Granted Patent B2
US 6,982,184 · App. 10/986,354 · Granted Jan 3, 2006

Method of fabricating MEMS devices on a silicon wafer

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 6,982,184
App. No.
10/986,354
Granted
Jan 3, 2006
Kind
B2
Abstract

A method of fabricating MEMS devices is provided. The method includes the steps of (a) providing a silicon wafer having a MEMS layer arranged on a MEMS side of the wafer; (b) applying a first holding means to the MEMS side of the wafer; (c) performing at least one operation on the wafer from a back side of the wafer opposed to the MEMS side; (d) applying a second holding means to said back side of the wafer; (e) removing the first holding means; (f) performing at least one deep silicon etch on the MEMS side of the wafer to define individual MEMS chips, each chip being composed of a part of the wafer and at least one part of the MEMS layer; and (g) causing the individual chips to be released from the second holding means.

Claims (16)

1. A method of fabricating MEMS devices, the method including the steps of:

providing a silicon wafer having a MEMS layer arranged on a MEMS side of the wafer;

applying a first holding means to the MEMS side of the wafer;

performing at least one operation on the wafer from a back side of the wafer opposed to the MEMS side;

performing at least one deep silicon etch on the back side of the wafer to define individual MEMS chips, each chip being composed of a part of the wafer and at least one part of the MEMS layer;

applying a second holding means to said back side of the wafer;

removing the first holding means; and

causing the individual chips to be released from the second holding means.

2. The method of claim 1 which includes bonding the first holding means to the wafer.

3. The method of claim 2 which includes applying a handling means to the first holding means.

4. The method of claim 1 in which the operations performed on the wafer include at least one of thinning the wafer.

5. The method of claim 1 which includes applying the second holding means to the wafer before removal of the first holding means.

6. The method of claim 1 which includes bonding the second holding means to the wafer.

7. The method of claim 6 in which the second holding means is bonded to the wafer by means of an adhesive which is curable by exposure to ultraviolet (UV) light, and in which the method includes exposing localised regions of the second holding means to the UV light to release one chip at a time from the second holding means to enable each chip to be removed individually from the second holding means.

8. The method of claim 7 which includes applying a handling means to the second holding means, the handling means being transparent to UV light so that UV light is transmitted through the handling means to cure the adhesive of the second holding means.

9. The method of claim 7 which includes removing each chip from the second holding means by a transporting means.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 18, 2014
From: SILVERBROOK RESEARCH PTY. LIMITED
To: ZAMTEC LIMITED
Reel/Frame 032274/0397 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 12, 2004
From: SILVERBROOK, KIA
To: SILVERBROOK RESEARCH. LTD.
Reel/Frame 015984/0770 →