Method of in-wafer testing of monolithic photonic integrated circuits (PICs) formed in a semiconductor wafer

1. A method of in-wafer testing of monolithic photonic integrated circuits (PICs) formed in a semiconductor wafer where each such circuit comprises two or more integrated electro-optic components, one of each in tandem forming a signal channel in the circuit, and comprising the steps of:

providing a first integrated photodetector at a rear end of each signal channel and a second integrated photodetector at forward end of each signal channel;

sequentially operating a first of a selected channel electro-optic component in a selected circuit to monitor light output from a channel via its first corresponding channel photodetector and adjusting its operating characteristics by detecting that channel electro-optic component output via its second corresponding channel photodetector to provide first calibration data;

sequentially operating a second of a selected channel electro-optic component in the selected circuit to monitor signal output from the second selected channel electro-optic component via its second corresponding channel photodetector and adjusting its operating characteristics by detecting that channel electro-optic component output via its second corresponding channel photodetector to provide second calibration data; and

thereafter storing the first and second calibration data for each circuit channel for the selected circuit for future reference.

2. The method of claim 1 wherein the first electro-optic component operating characteristics are its applied bias or its operational wavelength.

3. The method of claim 1 wherein the second electro-optic component operating characteristics are its applied bias, extinction ratio or chirp.

4. The method of claim 1 comprising the further step of fabricating the in-wafer circuit to be an optical transmitter photonic integrated circuit (TxPIC) with a plurality of signal channels each comprising an in-tandem laser source and modulator.

5. The method of claim 4 comprising the further step of combining outputs in the circuit from the signal channels to provide a multiplexed signal on an output of the circuit.

6. The method of claim 4 comprising the further step of employing the first calibration data for tuning the laser source wavelength to a predetermined wavelength.

7. The method of claim 6 wherein the step of tuning is accomplished by adjusting a bias current to the laser source in each signal channel.

8. The method of claim 6 wherein the step of tuning is accomplished by adjusting heat applied to a local heater for the laser source in each signal channel.

9. The method of claim 4 comprising the further step of fabricating in each signal channel a semiconductor optical amplifier (SOA) and adjusting the applied bias current to each SOA to provide a desired output power from each laser.

10. The method of claim 4 comprising the further step of employing the second calibration data for adjusting the bias point of operation of the modulator to achieve optimum extinsion ratio and chirp.

11. A method of in-wafer testing of monolithic photonic integrated circuits (PICs) formed in a semiconductor wafer, each circuit comprising an array of integrated laser sources and an array of integrated electro-optic modulators, one each for each of the laser sources, and an optical combiner to receive the modulated signal outputs from each of the electro-optic modulators comprising the steps of:

providing a first integrated photodetector at a rear facet of each of said laser sources in each circuit;

providing a second integrated photodetector between each of said modulators and said optical combiner in each circuit;

sequentially operating each of the laser sources in a selected circuit to monitor light output from a laser source via its first corresponding photodetector and calibrate its operating characteristics by detecting the laser source output via its second corresponding photodetector thereby providing first calibration data;

sequentially operating each of the modulators in the selected circuit to monitor signal output from a modulator via its second corresponding photodetector and adjusting its bias point of operation to achieve optimum extinsion ratio and chirp thereby providing second calibration data; and

thereafter storing the first and second calibration data for each circuit for future reference.

12. The method of claim 11 further comprising the steps of:

cleaving each circuit from the wafer forming a photonic integrated circuit (PIC) chip; and

cleaving from each chip the first integrated photodetectors.

13. The method claim 11 further comprising the steps of:

cleaving each circuit from the wafer forming a photonic integrated circuit (PIC) chip; and

operating each second photodetector either as a monitoring photodiode of the signal light from each modulator.

14. The method of claim 11 further comprising the steps of:

cleaving each circuit from the wafer forming a photonic integrated circuit (PIC) chip; and

biasing each second photodetector to be transparent to light generated from its corresponding laser source.

15. The method claim 14 wherein the biasing is a small positive value or zero.

16. The method of claim 11 wherein said first and second photodetectors are avalanche photodiodes (APDs) or PIN photodiodes.

17. A method of in-wafer testing of monolithic photonic integrated circuit (PICs) formed in a semiconductor wafer, each circuit comprising an array of integrated laser sources and an array of integrated electro-optic modulators, one each for each of the laser sources, and an optical combiner to receive the modulated signal outputs from each of the electro-optic modulators comprising the steps of:

providing an integrated photodetector between each of said laser sources and said modulators or between said modulators and said optical combiner in each circuit;

sequentially operating each of the laser sources in a selected chip to monitor light output from a laser source via its corresponding photodetector and calibrate its operating characteristics by detecting the laser source output via its corresponding photodetectors;

sequentially operating each of the modulators in the selected chip to monitor signal output from a modulator via its corresponding photodetector and adjusting its bias point of operation to achieve optimum extinsion ratio and chirp thereby providing calibration data relating to the circuit; and

thereafter storing the calibration data for each circuit for future reference.

18. The method of claim 17 further comprising the steps of:

determining that one or more of the laser sources or modulators in particular circuit in the wafer do not function properly;

cleaving the circuits from the wafer forming a photonic integrated circuit (PIC) chips; and

thereafter discarding the chips that do not function properly.

19. The method of claim 17 further comprising the steps of:

determining that one or more of the laser sources or modulators in a substantial number of circuits in the wafer do not function properly; and

thereafter discarding the wafer thereby saving resources normally consumed where the circuits are tested after being cleaved from the wafer.