IP Library Granted Patent US 7,164,313
Granted Patent B2
US 7,164,313 · App. 10/988,432 · Granted Jan 16, 2007

Method and apparatus for opening a feedback loop

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Quick Facts
Patent No.
US 7,164,313
App. No.
10/988,432
Granted
Jan 16, 2007
Kind
B2
Abstract

Circuits, methods, and systems are provided for opening a primary feedback loop in a transmitter. An auxiliary feedback loop can be closed when the primary feedback loop is opened, and a controller can match a gain of the primary feedback loop to another gain in the transmitter.

Claims (83)

1. A circuit comprising:

a signal combiner operable to receive an input signal and a feedback signal and produce a combined signal at an output of the signal combiner;

a selector operable to provide the feedback signal to the signal combiner;

a power amplifier, the output of the signal combiner coupled to an input of the power amplifier;

a first feedback path operable to couple an output of the power amplifier to a first input of the selector; and

a second feedback path operable to couple the input of the power amplifier to a second input of the selector.

2. The circuit of claim 1 , wherein the power amplifier includes an adjustable amplifier, an input of the adjustable amplifier is coupled to the output of the signal combiner and an output of the adjustable amplifier is coupled to the input of the power amplifier, the circuit further comprising:

a controller coupled to a node in the first feedback path and coupled to a node in the second feedback path, the controller operable to adjust a gain of the adjustable amplifier.

3. The circuit of claim 2 , wherein the controller adjusts the gain of the adjustable amplifier until a gain of a loop including the first feedback path and a gain of a loop including the second feedback path are substantially equal.

4. The circuit of claim 2 , wherein the controller includes a qualifier operable to modify the adjustment of the gain of the adjustable amplifier based on a set of rules limiting allowable adjustments.

5. The circuit of claim 2 , wherein the controller includes a gain step element operable to adjust the gain of the adjustable amplifier in conjunction with a change in an output power of the circuit.

6. The circuit of claim 2 , wherein the controller includes:

a first power detector operable to measure a power of the first feedback path and produce a first power signal;

a second power detector operable to measure a power of the second feedback path and produce a second power signal; and

a combiner operable to receive the first power signal and the second power signal and produce an error signal.

7. The circuit of claim 6 , wherein the controller includes a filter operable to receive the error signal and produce a filtered signal, the controller adjusting the gain of the adjustable amplifier using the filtered signal.

8. The circuit of claim 6 , wherein the controller includes:

a first variable-gain amplifier coupled to an input of the first power detector; and

a second variable-gain amplifier coupled to an input of the second power detector.

9. The circuit of claim 6 , wherein:

the first power detector includes a first multiplier operable to calculate a mean-square value of the power of the first feedback path; and

the second power detector includes a second multiplier operable to calculate a mean-square value of the power of the second feedback path.

10. The circuit of claim 6 , wherein:

the first power detector includes a first rectifier operable to calculate an absolute value of the power of the first feedback path; and

the second power detector includes a second rectifier operable to calculate an absolute value of the power of the second feedback path.

11. The circuit of claim 6 , wherein the controller includes a digitizer operable to receive the error signal and produce a digital error signal.

12. The circuit of claim 1 , further comprising:

an integrating gain amplifier coupled to the output of the signal combiner and coupled to the input of the power amplifier.

13. The circuit of claim 1 , wherein the first feedback path includes in-phase and quadrature first feedback paths and the second feedback path includes in-phase and quadrature second feedback paths.

14. The circuit of claim 1 , wherein the second feedback path includes a rotator.

15. The circuit of claim 1 , wherein at least one of the first feedback path and the second feedback path includes a variable-gain element.

16. The circuit of claim 1 , further comprising:

a first amplifier coupled to the input of the power amplifier, wherein the first feedback path includes a second amplifier, and the second feedback path includes a third amplifier.

17. A circuit comprising:

a forward path including an adjustable amplifier;

a first selector having at least two inputs and an output, the output of the first selector coupled to an input of the forward path;

a feedback path coupling an output of the forward path to an input of the first selector; and

a controller operable to measure a signal at a node in the feedback path, to measure a signal at a node in the forward path before the adjustable amplifier, and to adjust a gain of the adjustable amplifier responsive to the measurements, the gain being adjusted substantially concurrently with amplification of a transmit signal by the adjustable amplifier.

18. The circuit of claim 17 , further comprising:

a second selector having at least two inputs and an output, the output of the second selector coupled to the input of the forward path; and

a first amplifier coupled to a first input of the second selector, an input of the first amplifier coupled to an input of the circuit, a second input of the second selector coupled to the input of the circuit.

19. The circuit of claim 18 , wherein:

the forward path includes a second amplifier and a power amplifier;

the feedback path includes a third amplifier; and

the outputs of the first and second selectors are coupled to the input of the forward path through a signal combiner.

20. The circuit of claim 17 , further comprising:

a controller amplifier coupling the controller to the node in the forward path where the controller measures the signal, wherein the controller adjusts the gain of the adjustable amplifier until a gain of a loop including the feedback path and a gain of the controller amplifier are substantially equal.

21. The circuit of claim 20 , wherein the controller includes:

a first power detector operable to measure a power of the feedback path and produce a first power signal;

a second power detector operable to measure a power at an output of the controller amplifier and produce a second power signal; and

a combiner operable to receive the first power signal and the second power signal and produce an error signal.

22. The circuit of claim 21 , wherein the controller includes a filter operable to receive the error signal and produce a filtered signal, the controller adjusting the gain of the adjustable amplifier using the filtered signal.

23. The circuit of claim 21 , wherein the controller includes:

a first variable-gain amplifier coupled to an input of the first power detector; and

a second variable-gain amplifier coupled to an input of the second power detector.

24. The circuit of claim 21 , wherein:

the first power detector includes a first multiplier operable to calculate a mean-square value of the power of the feedback path; and

the second power detector includes a second multiplier operable to calculate a mean-square value of the power at the output of the controller amplifier.

25. The circuit of claim 21 , wherein:

the first power detector includes a first rectifier operable to calculate an absolute value of

the power of the feedback path; and

the second power detector includes a second rectifier operable to calculate an absolute value of the power at the output of the controller amplifier.

26. The circuit of claim 21 , wherein the controller includes a digitizer operable to receive the error signal and produce a digital error signal.

27. The circuit of claim 17 , wherein the controller includes a qualifier operable to modify the adjustment of the gain of the adjustable amplifier based on a set of rules limiting allowable adjustments.

28. The circuit of claim 17 , wherein the controller includes a gain step element operable to adjust the gain of the adjustable amplifier in conjunction with a change in an output power of the circuit.

29. A method comprising:

measuring a first power of a first feedback path associated with a transmitter;

measuring a second power of a second feedback path associated with the transmitter;

calculating a difference between the first power and the second power; and

adjusting a gain of an amplifier associated with the transmitter responsive to the difference until the first power and the second power are substantially equal.

30. The method of claim 29 , further comprising:

decoupling the first feedback path from an input of a forward path; and

coupling the second feedback path to the input of the forward path, the decoupling and the coupling occurring substantially simultaneously.

31. The method of claim 30 , wherein the first feedback path is decoupled when a power of the transmitter falls below a threshold.

32. The method of claim 29 , further comprising:

filtering the difference to form a gain estimate, wherein adjusting the gain responsive to the difference includes using the gain estimate to adjust the gain.

33. The method of claim 32 , further comprising:

disqualifying a change in the gain estimate to limit a change in an output power.

34. The method of claim 33 , further comprising:

restarting the filtering of the difference when the change in the gain estimate is disqualified, the restarting of the filtering serving to reset the gain estimate.

35. The method of claim 29 , further comprising:

applying a step to the gain responsive to a change in a gain of the first feedback path, the second feedback path, or both.

36. The circuit of claim 1 , wherein the selector is directly coupled to the signal combiner.

Assignments (8)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 047196 FRAME: 0097. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048555/0510 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047196/0097 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 13, 2010
From: BECEEM COMMUNICATIONS, INC.
To: BROADCOM CORPORATION
Reel/Frame 025473/0591 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 17, 2007
From: ASPENDOS COMMUNICATIONS
To: BECEEM COMMUNICATIONS INC.
Reel/Frame 019984/0384 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 14, 2005
From: CAPOFREDDI, PETER; SHAEFFER, DEREK K.; DAKSHINAMURTHY, SRIRAMAN; TITIZER, KORHAN
To: ASPENDOS COMMUNICATIONS
Reel/Frame 015715/0718 →