IP Library Granted Patent US 7,099,794
Granted Patent B2
US 7,099,794 · App. 10/996,760 · Granted Aug 29, 2006

Method, apparatus, and system for memory read transaction biasing in mirrored mode to provide thermal management

Assignee: Intel Corporation
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Quick Facts
Patent No.
US 7,099,794
App. No.
10/996,760
Granted
Aug 29, 2006
Kind
B2
Abstract

A thermal management that redirects the target of read transactions from a thermally failed Dual Inline Memory Module (DIMM) in one mirror, to the corresponding DIMM in the other mirror. The memory controller or MCH would effectively bias the read transactions toward the mirror that is best able to respond based on thermal feedback. Likewise, this may be used as a temporary redirection that continues for only as long as was required to reduce the operating temperature in the failing DIMM.

Claims (16)

1. A method for thermal management of a memory subsystem of at least a first and second DIMM comprising

sensing a temperature for a first DIMM that meets or exceeds a predetermined threshold; and

redirecting a read transaction from the first DIMM in one mirror, to the corresponding second DIMM in the other mirror, if the sensed temperature of the first DIMM has met or exceeded the predetermined threshold,

disabling the redirection of the read transaction from the first DIMM when the sensed temperature of the first DIMM decreases below the predetermined threshold.

2. A memory controller hub (MCH) comprising:

the MCH to receive write and read transactions from a CPU; and

the MCH to redirect a read transaction from a first DIMM in one mirror that has a sensed temperature that meets or exceeds a predetermined threshold, to a corresponding second DIMM in the other mirror; and the MCH disabling the redirection of the read transaction from the first DIMM when the sensed temperature of the first DIMM decreases below the predetermined threshold.

3. A memory controller comprising:

the memory controller to receive write and read transactions from a CPU; and

the memory controller to redirect a read transaction from a first DIMM in one mirror that has a sensed temperature that meets or exceeds a predetermined threshold, to a corresponding second DIMM in the other mirror; and

the memory controller disabling the redirection of the read transaction from the first DIMM when the sensed temperature of the first DIMM decreases below the predetermined threshold.

4. A system comprising:

a CPU to generate read and write transactions;

a logic to receive write and read transactions from the CPU; and

the logic to redirect a read transaction from a first DIMM in one mirror that has a sensed temperature that meets or exceeds a predetermined threshold, to a corresponding second DIMM in the other mirror; and

the logic disabling the redirection of the read transaction from the first DIMM when the sensed temperature of the first DIMM decreases below the predetermined threshold.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 14, 2014
From: INTEL CORPORATION
To: SONY CORPORATION OF AMERICA
Reel/Frame 032893/0199 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 23, 2004
From: LECLERG, FRANK E; VOGT, PETE D
To: INTEL CORPORATION
Reel/Frame 016035/0339 →
Continuity (1)
Related Publication 20060111866A1 · May 25, 2006