IP Library Granted Patent US 7,435,617
Granted Patent B2
US 7,435,617 · App. 10/999,716 · Granted Oct 14, 2008

Method of fabricating an optoelectronic device having a bulk heterojunction

Assignee: The Trustees of Princeton University
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Quick Facts
Patent No.
US 7,435,617
App. No.
10/999,716
Granted
Oct 14, 2008
Kind
B2
Abstract

A method of fabricating an optoelectronic device comprises: depositing a first layer having protrusions over a first electrode, in which the first layer comprises a first organic small molecule material; depositing a second layer on the first layer such that the second layer is in physical contact with the first layer; in which the smallest lateral dimension of the protrusions are between 1 to 5 times the exciton diffusion length of the first organic small molecule material; and depositing a second electrode over the second layer to form the optoelectronic device. A method of fabricating an organic optoelectronic device having a bulk heterojunction is also provided and comprises: depositing a first layer with protrusions over an electrode by organic vapor phase deposition; depositing a second layer on the first layer where the interface of the first and second layers forms a bulk heterojunction; and depositing another electrode over the second layer.

Claims (42)

1. A method of fabricating an optoelectronic device, comprising:

depositing a first layer having protrusions over a first electrode, wherein the first layer comprises a first organic small molecule material;

depositing a second layer on the first layer such that the second layer is in physical contact with the first layer and the interface of the second layer and the first layer forms a bulk heterojunction;

wherein the smallest lateral dimension of the protrusions is between 1 to 5 times the exciton diffusion length of the first organic small molecule material; and

depositing a second electrode over the second layer to form the optoelectronic device.

2. The method of claim 1 , wherein the second layer comprises polymer or semiconductor material.

3. The method of claim 2 , wherein the spacing between protrusions is between 1 to 5 times the exciton diffusion length of the second layer.

4. The method of claim 1 , wherein the second layer comprises a metal.

5. The method of claim 1 , wherein the height of the protrusions is at least equal to half of the smallest lateral dimension of the protrusions.

6. The method of claim 1 , wherein:

the first layer having protrusions is deposited over the first electrode by organic vapor phase deposition, and the smallest lateral dimension of the protrusions is at least 5% less than the thickness of the device; and

the second layer has a planar surface.

7. The method of claim 6 , wherein the first layer is an electron acceptor layer, the first electrode is a cathode, the second layer is an electron donor layer, and the second electrode is an anode.

8. The method of claim 6 , further comprising depositing the first layer over a substrate.

9. The method of claim 6 , wherein the device has a current density, J SC , greater than 9 (mA/cm 2 ) and an open circuit voltage, V OC , between 0.4 volts and 1 volts.

10. The method of claim 6 , wherein the device has a series resistance of less than 10 Ωcm 2 .

11. The method of claim 6 , wherein the device has an external power conversion efficiency of at least 1.5% under 100 mW/cm 2 (AM 1.5 G) illumination.

12. The method of claim 6 , further comprising:

depositing a charge recombination layer over the second layer;

depositing a third layer having protrusions over the second electrode by organic vapor phase deposition, wherein the third layer comprises a third organic small molecule material and the smallest lateral dimension of the protrusions is at least 5% less than the thickness of the device;

depositing a fourth layer on the third layer such that the fourth layer is in physical contact with the third layer, wherein the interface of the fourth layer and the third layer forms a bulk heterojunction, and the fourth layer has a planar surface; and

depositing a third electrode over the second layer to form the optoelectronic device.

13. The method of claim 6 , wherein the first layer is an electron donor layer, the first electrode is an anode, the second layer is an electron acceptor layer, and the second electrode is a cathode.

14. The method of claim 13 , wherein the first electrode comprises ITO, the first layer comprises CuPc, and the second layer comprises PTCBI.

15. The method of claim 14 , wherein the source evaporation temperature for deposition of the first layer is at least 400° C.

16. The method of claim 14 , wherein the underlying substrate temperature for deposition of the first layer is less than 40° C.

17. The method of claim 14 , wherein the nitrogen gas carrier flow rate for deposition of the first layer is from 10-200 sccm.

18. The method of claim 14 , wherein the chamber pressure for deposition of the first layer is from 0.15-0.80 Torr.

19. The method of claim 14 , wherein the source evaporation temperature for deposition of the second layer is at least 400° C.

20. The method of claim 14 , wherein the substrate temperature for deposition of the second layer is less than 25° C.

21. The method of claim 14 , wherein the nitrogen gas carrier flow rate for deposition of the first layer is at least 100 sccm.

22. The method of claim 14 , wherein the chamber pressure is from at least 0.50 Torr.

23. The method of claim 13 , further comprising depositing a third layer over the second layer, such that the second electrode is deposited over the third layer.

24. The method of claim 23 , wherein the third layer is an exciton blocking layer.

25. The method of claim 24 , wherein the third layer comprises BCP.

26. The method of claim 23 , further comprising:

depositing an electron-hole recombination zone over the third layer;

depositing a fourth layer over the electron-hole recombination zone by organic vapor phase deposition, wherein the fourth layer comprises a fourth organic small molecule material;

depositing a fifth layer on the fourth layer such that the fifth layer is in physical contact with the fourth layer, wherein the interface of the fifth layer on the fourth layer forms a bulk heterojunction, and the fifth layer has a planar surface; and

depositing an exciton blocking layer over the fifth layer; and,

depositing the second electrode over the fifth layer to form the optoelectronic device.

27. The method of claim 13 , wherein the first electrode comprises ITO, the first layer comprises CuPc, and the second layer comprises C 60 .

Assignments (3)
CONFIRMATORY LICENSE Recorded Mar 18, 2010
From: PRINCETON UNIVERSITY, TRUSTEES OF, THE
To: ENERGY, UNITED STATES DEPARTMENT OF
Reel/Frame 024105/0808 →
CONFIRMATORY LICENSE Recorded Nov 16, 2009
From: PRINCETON UNIVERSITY
To: UNITED STATES AIR FORCE
Reel/Frame 023525/0404 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 18, 2005
From: SHTEIN, MAX; YANG, FAN; FORREST, STEPHEN R.
To: TRUSTEES OF PRINCETON UNIVERSITY, THE
Reel/Frame 016462/0953 →
Continuity (2)
Continuation In Part 1082428800 · Apr 13, 2004
Related Publication 20050227390A1 · Oct 13, 2005