Semiconductor device
View Patent ↗As etch-stop films or Cu-diffusion barrier films used in insulation films constituting conductor layers of a stacked structure, films having smaller dielectric constant than silicon nitride films are used, and an insulation film at a lower-layer part of the stacked structure is made to have smaller dielectric constant than that at an upper-layer part thereof, and further this insulation film is a silicon oxide (SiO) film and has, in the interior thereof, nano-pores of from 0.05 nm or more to 4 nm or less in diameter as chief construction. This makes it possible to dramatically reduce effective dielectric constant while keeping the mechanical strength of the conductore layers themselves, and can materialize a highly reliable and high-performance semiconductor device having mitigated the wiring delay of signals which pass through wirings.
1. A semiconductor device comprising a substrate and a plurality of conductor layers stacked thereon;
each of said conductor layers having a first insulation layer, a second insulation layer and a third insulation layer, and a conductor wiring having been so formed as to extend through these three insulation layers,
each of said first insulation layer and said third insulation layer consists of at least one selected from the group consisting of silicon carbonitride, and silicon oxide;
a second insulation layer of a conductor layer positioned at a lower-layer part among said conductor layers has a dielectric constant smaller than that of a second insulation layer of a conductor layer positioned at an upper-layer part among said conductor layers, wherein;
a second insulation layer of a conductor layer positioned at a lower-layer part among said conductor layers is a porous silicon oxide having a dielectric constant of less than or equal to 2.5 and
a second insulation layer of a conductor layer positioned at an upper-layer part among said conductor layers is a fluorine-doped silicon oxide having a dielectric constant of 3.6.
2. The semiconductor device according to claim 1 , wherein said second insulation layer of a conductor layer positioned at an upper-layer part among said conductor layers does not have nano-pores in the layer.
3. A semiconductor device comprising a substrate and a plurality of conductor layers stacked thereon;
each of said conductor layers having a first insulation layer, a second insulation layer and a third insulation layer, and a conductor wiring having been so formed as to extend through these three insulation layers,
each of said first insulation layer and said third insulation layer consists of at least one selected from the group consisting of silicon carbonitride, and silicon oxide;
a second insulation layer of a conductor layer positioned at a lower-layer part among said conductor layers has a dielectric constant smaller than that of a second insulation layer of a conductor layer positioned at an upper-layer part among said conductor layers, wherein;
a second insulation layer of a conductor layer positioned at a lower-layer part among said conductor layers is a porous silicon oxide having a dielectric constant of less than or equal 3.6; and
a second insulation layer of a conductor layer positioned at an upper-layer part among said conductor layers comprises at least one selected from the group consisting of fluorine-doped silicon oxide and carbon-doped silicon oxide.
4. A semiconductor device comprising a substrate and a plurality of conductor layers stacked thereon;
each of said conductor layers having a first insulation layer, a second insulation layer and a third insulation layer, and a conductor wiring having been so formed as to extend through these three insulation layers,
each of said first insulation layer and said third insulation layer consists of at least one selected from the group consisting of silicon carbonitride, and silicon oxide;
a second insulation layer of a conductor layer positioned at a lower-layer part among said conductor layers has a dielectric constant smaller than that of a second insulation layer of a conductor layer positioned at an upper-layer part among said conductor layers, wherein;
a second insulation layer of a conductor layer positioned at a lower-layer part among said conductor layers comprises silicon oxide having a dielectric constant of less than or equal to 3.6 and nano-pores mainly having diameter of from 0.05 nm or more to 4 nm or less; and
a second insulation layer of a conductor layer positioned at an upper layer part among said conductor layers comprises at least one selected front the group consisting of fluorine-doped silicon oxide and carbon-doped silicon oxide.