IP Library › Granted Patent US 7,173,271
Granted Patent B2
US 7,173,271 · App. 11/000,471 · Granted Feb 6, 2007

Phase-change memory device and method of manufacturing the same

Assignee: Hynix Semiconductor Inc.
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Quick Facts
Patent No.
US 7,173,271
App. No.
11/000,471
Granted
Feb 6, 2007
Kind
B2
Abstract

Disclosed are a phase-change memory device and its manufacturing method, which can reduce a contact area between a bottom electrode and a phase-change layer, thereby reducing the quantity of current necessary for phase change. The phase-change memory device comprises: a first oxide layer formed on a dielectric interlayer and a bottom electrode on a substrate and having a contact hole for exposing the bottom electrode formed in the first oxide layer; a spacer formed on a side surface of the contact hole; a phase-change layer formed on the spacer and the bottom electrode while forming a shape of another spacer; a second oxide layer filling in the contact hole while exposing an upper portion of the phase-change layer; and a top electrode formed on the first oxide layer while being in contact with the upper portion of the phase-change layer.

Claims (13)

1. A phase-change memory device comprising:

a semiconductor substrate having a bottom structure;

a dielectric interlayer formed on the semiconductor substrate and covering the bottom structure;

a contact plug formed within the dielectric interlayer;

a bottom electrode formed on the contact plug and a portion of the dielectric interlayer adjacent to the contact plug;

a first oxide layer formed on the dielectric interlayer and the bottom electrode and having a contact hole for exposing the bottom electrode formed within the first oxide layer;

a spacer formed on a side surface of the contact hole and on a first annular-shaped area of the bottom electrode:

a phase-change layer formed on the spacer and on a second annular shaped area on the bottom electrode that is within the first annular shaped area, said phase-change layer having substantially the same cross-sectional shape of said spacer, said phase-change layer being sized, shaped and arranged to appear to have a doughnut-shape when viewed from a plan view of said phase-change layer, the bottom of said phase-change lever contacting the bottom electrode through said second annular contact area, the top of said phase-change layer contacting a top electrode through an upper contact area of the phase-change layer that is away from the bottom of said phase-change layer;

a second oxide layer filling in the contact hole while exposing an upper portion of the phase-change layer; and

said top electrode formed on the first oxide layer while being in contact with the upper portion of the phase-change layer.

2. The phase-change memory device as claimed in claim 1 , wherein each of the bottom electrode and the top electrode is formed of a polysilicon film or a metal film.

3. The phase-change memory device as claimed in claim 1 , wherein the spacer is formed of a nitride film.

4. The phase-change memory device as claimed in claim 1 , wherein the first oxide film is formed of one selected from the group consisting of HDP, USG, SOG, BPSG, PSG, TEOS and HLD.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 30, 2004
From: CHANG, HEON YONG
To: HYNIX SEMICONDUCTOR INC.
Reel/Frame 016044/0253 →
Priority Claims (1)
KR 10-2004-0050072 · Jun 30, 2004 · national
Continuity (1)
Related Publication 20060006374A1 · Jan 12, 2006