IP Library Granted Patent US 8,266,373
Granted Patent B1
US 8,266,373 · App. 11/000,568 · Granted Sep 11, 2012

Content addressable memory (CAM) device and method for updating data by multiplexing between key register and mask value input

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Quick Facts
Patent No.
US 8,266,373
App. No.
11/000,568
Granted
Sep 11, 2012
Kind
B1
Abstract

A content addressable memory (CAM) can include a CAM memory array having both a data field and a mask field. A multiplexer (MUX) can selectively load data from either a register or an external data input to one or both fields of the CAM memory array.

Claims (47)

1. A content addressable memory (CAM), comprising:

a CAM memory array having a first field for storing data and a second field for storing mask data;

a register for storing data from an external data input; and

a multiplexer (MUX) coupled to the register, to the first and second fields of the CAM memory array, and to the external data input, the MUX selectively providing data from either the register or the external data input to one or both of the first and second fields of the CAM memory array.

2. The CAM of claim 1 , wherein:

the MUX comprises a 2×2 MUX adapted to load first data from the register to one or both of the first and second fields of the CAM memory array, and to load second data from the external data input to one or both of the first and second fields of the CAM memory array.

3. The CAM of claim 1 , wherein:

the register is coupled to store search key data from a search operation.

4. The CAM of claim 1 , wherein:

the MUX includes a control input coupled to receive learn instruction data.

5. The CAM of claim 4 , wherein:

the learn instruction data comprises a bit in a learn instruction applied to the CAM.

6. The CAM of claim 1 , wherein:

the MUX is adapted to load first data from the register to one of the first and second fields of the CAM memory array and load second data into the other of the first and second fields of the CAM memory array.

7. The CAM of claim 1 , further including:

N external data inputs, where N is a whole number greater than 2; and

the MUX is adapted to load second data from one of the N external data inputs to one or both of the first and second fields of the CAM memory array.

8. The CAM of claim 1 , further including:

M registers, where M is a whole number greater than 1; and

the MUX is adapted to load first data from one of the M registers to one or both of the first and second fields of the CAM memory array.

9. A method for storing data in a content addressable memory (CAM), comprising:

storing first data from a first external data input in a register of the CAM;

receiving second data from an external data input; and

selecting with a multiplexer (MUX) first data to be loaded from either the register or the external data input to one or both of first and second fields of a memory array.

10. The method of claim 9 , wherein:

the selecting step comprises the MUX providing first data from the register to either first or second fields of the memory array, and the MUX providing second data to either first or second fields of the memory array.

11. The method of claim 9 , wherein:

the selecting step comprises loading mask data into the second field and then loading data into the first field.

12. The method of claim 9 , further including:

initially executing a search operation; and

loading a search key of the search operation into the register as the first data.

13. The method of claim 9 , further including:

executing a learn operation in response to a learn instruction; and

the selecting step includes selecting first data and external data according to at least one bit of the learn instruction.

14. A content addressable memory (CAM) device, comprising:

a CAM array having a data field with a plurality of entries and a mask field that stores mask values corresponding to the entries; and

a multiplexer (MUX) having a first input coupled to receive an externally applied data value, a second input coupled to at least one register, and an output coupled to the CAM array, the at least one register coupled to receive a search key value from a search operation.

15. The CAM device of claim 14 , wherein:

the MUX has a control input coupled to receive learn instruction data.

16. The CAM device of claim 15 , wherein:

the MUX has a control input coupled to a signal corresponding to a bit value of the learn instruction.

17. The CAM device of claim 14 , wherein:

the MUX couples a search key value from a previous search operation to the data field, and a mask value on an external input to the mask field in response to a learn operation command.

18. The CAM device of claim 14 , wherein:

the MUX has the second input coupled to receive the externally applied data value from one of a plurality of data inputs.

19. The CAM device of claim 14 , wherein:

the MUX has the first input coupled to a plurality of registers.

Assignments (12)
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER TO 09/05/2018 PREVIOUSLY RECORDED AT REEL: 047230 FRAME: 0133. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047630/0456 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047230/0133 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 16, 2015
From: NETLOGIC I LLC
To: BROADCOM CORPORATION
Reel/Frame 035443/0763 →
CHANGE OF NAME Recorded Apr 16, 2015
From: NETLOGIC MICROSYSTEMS, INC.
To: NETLOGIC I LLC
Reel/Frame 035443/0824 →
RELEASE OF SECURITY INTEREST Recorded Aug 30, 2011
From: SILICON VALLEY BANK
To: NETLOGIC MICROSYSTEMS, INC.; NETLOGIC MICROSYSTEMS INTERNATIONAL LIMITED; NETLOGIC MICROSYSTEMS CAYMANS LIMITED
Reel/Frame 026830/0141 →
SECURITY AGREEMENT Recorded Jul 17, 2009
From: NETLOGIC MICROSYSTEMS, INC.; NETLOGIC MICROSYSTEMS INTERNATIONAL LIMITED; NETLOGIC MICROSYSTEMS CAYMANS LIMITED
To: SILICON VALLEY BANK
Reel/Frame 022973/0710 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 26, 2007
From: CYPRESS SEMICONDUCTOR CORPORATION
To: NETLOGIC MICROSYSTEMS, INC.
Reel/Frame 018961/0327 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 28, 2006
From: CYPRESS SEMICONDUCTOR CORPORATION
To: NETLOGIC MICROSYSTEMS, INC.
Reel/Frame 017379/0729 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 10, 2005
From: SMITH, SCOTT
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 016133/0288 →