Patent Assignment
Reel/Frame 035443/0824
CHANGE OF NAME
Recorded: 2015-04-16
Received: 2015-04-16
Pages: 32
Assignor
NETLOGIC MICROSYSTEMS, INC.
Executed: 2013-01-23
Assignee
NETLOGIC I LLC
160 GREENTREE DRIVE, DOVER, DE, 19904, UNITED STATES
Covered Applications
(100)
Recommending Content Items in a Social Network Using Delayed Interaction
App. No. 14/585,085
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INTEGRATED CIRCUIT DEVICES, SYSTEMS AND METHODS HAVING AUTOMATIC CONFIGURABLE MAPPING OF INPUT AND/OR OUTPUT DATA CONNECTIONS
App. No. 14/069,590
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SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR CONDITIONALLY SENDING A REQUEST FOR DATA TO A NODE BASED ON A DETERMINATION
App. No. 14/056,118
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REDUCING LATENCY ASSOCIATED WITH TIMESTAMPS
App. No. 14/024,063
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MESSAGING NETWORK FOR PROCESSING DATA USING MULTIPLE PROCESSOR CORES
App. No. 13/972,797
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Systems, Circuits and Methods for Filtering Signals to Compensate for Channel Effects
App. No. 13/931,099
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Multi-Value Logic Signaling in Multi-Functional Circuits
App. No. 13/929,415
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System and Method for Performing Concatenation of Diversely Routed Channels
App. No. 13/925,531
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SYSTEM AND METHOD FOR CONDITIONALLY SENDING A REQUEST FOR DATA TO A HOME NODE
App. No. 13/875,016
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Programmable Drive Strength in Memory Signaling
App. No. 13/762,927
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METHODS AND CIRCUITS FOR LIMITING BIT LINE LEAKAGE CURRENT IN A CONTENT ADDRESSABLE MEMORY (CAM) DEVICE
App. No. 13/729,771
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Secure Modulation and Demodulation
App. No. 13/725,829
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Low-Power and Low-Cost Adaptive Self-Linearization System with Fast Convergence
App. No. 13/689,294
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Method and Device for Reordering Video Information
App. No. 13/620,190
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MULTI-PHASE POWER SYSTEM WITH REDUNDANCY
App. No. 13/618,652
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MULTI-PHASE POWER SYSTEM WITH REDUNDANCY
App. No. 13/618,617
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CONTENT ADDRESSABLE MEMORY (CAM) DEVICE AND METHOD FOR UPDATING DATA
App. No. 13/596,495
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SECURE MODULATION AND DEMODULATION
App. No. 13/555,783
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BLOCK MAPPING CIRCUIT AND METHOD FOR MEMORY DEVICE
App. No. 13/555,908
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WEIGHTED INSTRUCTION COUNT SCHEDULING
App. No. 13/396,007
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CONTENT ADDRESSABLE MEMORY ARRAY HAVING LOCAL INTERCONNECTS
App. No. 13/371,236
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TARGETED SEARCH SYSTEM WITH DE-OBFUSCATING FUNCTIONALITY
App. No. 13/355,051
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METHODS AND APPARATUS FOR CLOCK AND DATA RECOVERY USING TRANSMISSION LINES
App. No. 13/351,956
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SYSTEM FOR DYNAMICALLY MANAGING POWER CONSUMPTION IN A SEARCH ENGINE
App. No. 13/351,689
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POWER SAVINGS IN A CONTENT ADDRESSABLE MEMORY DEVICE USING MASKED PRE-COMPARE OPERATIONS
App. No. 13/345,128
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SYSTEMS AND METHODS FOR UTILIZING AN EXTENDED TRANSLATION LOOK-ASIDE BUFFER HAVING A HYBRID MEMORY STRUCTURE
App. No. 13/330,662
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CASCADED CONTENT ADDRESSABLE MEMORY ARRAY HAVING MULTIPLE ROW SEGMENT ACTIVATION
App. No. 13/311,301
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INCREMENTAL ADAPTIVE MATCH LINE CHARGING WITH CALIBRATION
App. No. 13/306,896
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Content Addressable Memory Having Column Segment Redundancy
App. No. 13/301,499
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Content Addressable Memory Having Half-Column Redundancy
App. No. 13/301,419
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MODEL BASED DISTORTION REDUCTION FOR POWER AMPLIFIERS
App. No. 13/288,741
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SELF-TIMED MATCH LINE CASCADING IN A PARTITIONED CONTENT ADDRESSABLE MEMORY ARRAY
App. No. 13/283,422
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DELAY LINE CORRELATOR
App. No. 13/373,475
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DELEGATING NETWORK PROCESSOR OPERATIONS TO STAR TOPOLOGY SERIAL BUS INTERFACES
App. No. 13/253,044
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METHOD AND APPARATUS FOR REDUCING POWER CONSUMPTION DURING RULE SEARCHES IN A CONTENT SEARCH SYSTEM
App. No. 13/247,850
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ADVANCED PROCESSOR WITH MECHANISM FOR PACKET DISTRIBUTION AT HIGH LINE RATE
App. No. 13/226,384
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Content Search System Having Multiple Pipelines
App. No. 13/226,237
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Content Search System Having Embedded Power Control Units
App. No. 13/226,220
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DISTORTION CANCELLATION USING ADAPTIVE LINEARIZATION
App. No. 13/220,505
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LOW POWER AND LOW COMPLEXITY ADAPTIVE SELF-LINEARIZATION
App. No. 13/220,504
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QUATERNARY CONTENT ADDRESSABLE MEMORY CELL HAVING ONE TRANSISTOR PULL-DOWN STACK
App. No. 13/216,104
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CONTENT ADDRESSABLE MEMORY WITH BASE-THREE NUMERAL SYSTEM
App. No. 13/215,887
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SYSTEM AND METHOD FOR OFFLOADING PACKET PROTOCOL ENCAPSULATION FROM SOFTWARE
App. No. 13/205,420
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ADVANCED PROCESSOR TRANSLATION LOOKASIDE BUFFER MANAGEMENT IN A MULTITHREADED SYSTEM
App. No. 13/195,785
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INTEGRATED CIRCUIT DEVICES, SYSTEMS AND METHODS HAVING AUTOMATIC CONFIGURABLE MAPPING OF INPUT AND/OR OUTPUT DATA CONNECTIONS
App. No. 13/192,381
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SYSTEM FOR DYNAMICALLY MANAGING POWER CONSUMPTION IN A SEARCH ENGINE
App. No. 13/190,179
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METHODS, SYSTEMS AND CIRCUITS FOR CANCELLING REFLECTIONS ON A CHANNEL
App. No. 13/182,379
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LOW POWER SERIAL LINK
App. No. 13/173,576
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ENCODING DATA FOR STORAGE IN A CONTENT ADDRESSABLE MEMORY
App. No. 13/169,682
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CONTENT ADDRESSABLE MEMORY ARRAY HAVING VIRTUAL GROUND NODES
App. No. 13/167,646
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Content Addressable Memory Row Having Virtual Ground and Charge Sharing
App. No. 13/167,552
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PACKET SCHEDULING USING A PROGRAMMABLE WEIGHTED FAIR QUEUING SCHEDULER THAT EMPLOYS DEFICIT ROUND ROBIN
App. No. 13/166,749
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TCP SEGMENTATION OFFLOAD (TSO) USING A HYBRID APPROACH OF MANIPULATING MEMORY POINTERS AND ACTUAL PACKET DATA
App. No. 13/165,768
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METHOD AND APPARATUS FOR HANDLING DATA FLOW IN A MULTI-CHIP ENVIRONMENT USING AN INTERCHIP INTERFACE
App. No. 13/165,417
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PERFORMANCE OF A STRIDE-BASED PREFETCHER ON AN OUT-OF-ORDER CENTRAL PROCESSING UNIT (CPU)
App. No. 13/165,736
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GUARANTEED RATE PORT SCHEDULER
App. No. 13/165,479
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PROGRAMMABLE MICRO-CORE PROCESSORS FOR SECURITY PROCESSING
App. No. 13/164,565
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PROGRAMMABLE MICRO-CORE PROCESSORS FOR PACKET PARSING WITH PACKET ORDERING
App. No. 13/164,533
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PROGRAMMABLE MICRO-CORE PROCESSORS FOR PACKET PARSING
App. No. 13/164,521
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DEVICE CONFIGURATION FOR MULTIPROCESSOR SYSTEMS
App. No. 13/164,319
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MULTI-PART CLOCK MANAGEMENT
App. No. 13/163,605
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Processor with packet ordering device
App. No. 13/154,413
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TERNARY CONTENT ADDRESSABLE MEMORY CELL HAVING TWO TRANSISTOR PULL-DOWN STACK
App. No. 13/149,885
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TERNARY CONTENT ADDRESSABLE MEMORY CELL HAVING SINGLE TRANSISTOR PULL-DOWN STACK
App. No. 13/149,878
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ADVANCED PROCESSOR SCHEDULING IN A MULTITHREADED SYSTEM
App. No. 13/115,012
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METHOD AND APPARATUS FOR IMPLEMENTING CACHE COHERENCY OF A PROCESSOR
App. No. 13/103,041
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ADVANCED PROCESSOR WITH MECHANISM FOR FAST PACKET QUEUING OPERATIONS
App. No. 13/084,516
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POWER LIMITING IN A CONTENT SEARCH SYSTEM
App. No. 13/069,220
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CONFIGURING A TUNABLE INDUCTOR ACROSS MULTIPLE LAYERS OF AN INTEGRATED CIRCUIT
App. No. 13/069,330
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UPDATING CAM ARRAYS USING PREFIX LENGTH DISTRIBUTION PREDICTION
App. No. 13/051,247
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PACKET FORMAT FOR ERROR REPORTING IN A CONTENT ADDRESSABLE MEMORY
App. No. 13/039,616
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SERIAL LINK TRAINING METHOD AND APPARATUS WITH DETERMINISTIC LATENCY
App. No. 13/034,441
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NETWORK PROCESSOR WITH TRAFFIC SHAPING RESPONSE BUS INTERFACE
App. No. 13/034,497
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SERIAL LINK INTERFACE POWER CONTROL METHOD AND APPARATUS WITH SELECTIVE IDLE DATA DISCARD
App. No. 13/034,570
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FAST QUATERNARY CONTENT ADDRESSABLE MEMORY CELL
App. No. 13/015,543
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SYSTEMS, METHODS, AND CIRCUITS FOR DRIVING LARGE OFF-CHIP LOADS
App. No. 12/987,861
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MINIMIZING STATE LISTS FOR NON-DETERMINISTIC FINITE STATE AUTOMATONS
App. No. 12/983,810
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SYSTEMS, CIRCUITS, AND METHODS FOR PHASE INVERSION
App. No. 12/978,045
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Systems, Circuits and Methods for Adapting Parameters of Components in a Receiver
App. No. 12/973,819
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Systems, Circuits and Methods for Adapting Parameters of a Linear Equalizer in a Receiver
App. No. 12/973,735
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Systems, Circuits and Methods for Adapting Taps of a Decision Feedback Equalizer in a Receiver
App. No. 12/973,797
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MATCH LINE PRECHARGE CIRCUITS AND METHODS FOR CONTENT ADDRESSABLE MEMORY (CAM) DEVICE
App. No. 12/964,712
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SYSTEMS, CIRCUITS, AND METHODS FOR PIPELINED FOLDING AND INTERPOLATING ADC ARCHITECTURE
App. No. 12/949,615
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MEMORY MANAGEMENT IN A TOKEN STITCHER FOR A CONTENT SEARCH SYSTEM HAVING PIPELINED ENGINES
App. No. 12/946,440
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OUTPUT QUEUED SWITCH WITH A PARALLEL SHARED MEMORY, AND METHOD OF OPERATING SAME
App. No. 12/946,780
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COMPACT INSTRUCTION FORMAT FOR CONTENT SEARCH SYSTEMS
App. No. 12/944,442
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Systems, circuits and methods for an analog echo canceller with interpolating output
App. No. 12/916,416
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Analog Echo Canceller with Interpolating Output
App. No. 12/916,425
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LOW POWER CONTENT ADDRESSABLE MEMORY DEVICE HAVING SELECTABLE CASCADED ARRAY SEGMENTS
App. No. 12/909,701
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SEGMENTED CONTENT ADDRESSABLE MEMORY DEVICE HAVING PIPELINED COMPARE OPERATIONS
App. No. 12/909,714
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METHODS FOR LOGICALLY COMBINING RANGE REPRESENTATION VALUES IN A CONTENT ADDRESSABLE MEMORY
App. No. 12/901,859
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PROCESSOR WITH COMPARE OPERATIONS BASED ON ANY OF MULTIPLE COMPARE DATA SEGMENTS
App. No. 12/901,886
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CONTENT ADDRESSABLE MEMORY DEVICE HAVING STATE INFORMATION PROCESSING CIRCUITRY
App. No. 12/899,171
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SYSTEMS, CIRCUITS AND METHODS FOR DUAL TRANSFORMER DUPLEXING
App. No. 12/895,556
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ADVANCED TELECOMMUNICATIONS ROUTER AND CROSSBAR SWITCH CONTROLLER
App. No. 12/890,551
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ADAPTIVE MATCH LINE CHARGING
App. No. 12/887,267
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TOKEN STITCHER FOR A CONTENT SEARCH SYSTEM HAVING PIPELINED ENGINES
App. No. 12/885,176
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POWER REDUCTION IN A CONTENT ADDRESSABLE MEMORY HAVING PROGRAMMABLE INTERCONNECT STRUCTURE
App. No. 12/873,122
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CONTENT ADDRESSABLE MEMORY HAVING SELECTIVELY INTERCONNECTED ROWS OF COUNTER CIRCUITS
App. No. 12/873,183
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PRECHARGE CIRCUITS AND METHODS FOR CONTENT ADDRESSABLE MEMORY (CAM) AND RELATED DEVICES
App. No. 12/861,084
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