IP Library Granted Patent US 8,811,599
Granted Patent B2
US 8,811,599 · App. 12/895,556 · Granted Aug 19, 2014

Systems, circuits and methods for dual transformer duplexing

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Quick Facts
Patent No.
US 8,811,599
App. No.
12/895,556
Granted
Aug 19, 2014
Kind
B2
Abstract

A circuit for the analog correlation of a signal to remove impairments such as echo, cross talk and intersymbol interference is described. A duplexing circuit which improves echo response by providing a second transformer is described.

Claims (29)

1. A duplexing circuit comprising:

a first resistor coupled between a first node and a second node;

a second resistor coupled between the second node and a third node;

a first transformer having a secondary winding coupled to a third resistor, and a primary winding coupled between the third node and a fourth node; and

a second transformer having a secondary winding and a primary winding, the primary winding of the second transformer coupled between the first and fourth nodes,

wherein the duplexing circuit is coupled to a low pass filter through a third transformer, the third transformer being a high frequency transformer.

2. The duplexing circuit of claim 1 , wherein the first transformer and the second transformer are high frequency transformers for coupling frequencies in a gigahertz (GHz) range.

3. The duplexing circuit of claim 1 , wherein the first resistor and the second resistor are 100 ohms.

4. The duplexing circuit of claim 1 , wherein a twisted pair input is coupled to the duplexing circuit through the second transformer.

5. The duplexing circuit of claim 1 , wherein the first transformer is coupled to the third resistor such that the third resistor is not directly connected into the duplexing circuit.

6. A method for improving echo response, comprising:

receiving an input signal from a wire coupled through a first transformer;

modulating the input signal by a second transformer coupled to a resistor for providing an improved echo response for the input signal; and

transmitting the input signal to a low pass filter,

wherein the transmission of the input signal to the low pass filter is through a third transformer, the third transformer being a high frequency transformer.

7. The method of claim 6 , wherein the first transformer and the second transformer are high frequency transformers for coupling frequencies in a gigahertz (GHz) range.

8. The method of claim 6 , wherein the resistor is 100 ohms.

9. The method of claim 6 , wherein the input signal comprises a twisted pair input.

10. The method of claim 6 , wherein the first transformer is coupled to a second resistor.

11. The method of claim 6 , wherein the low pass filter is coupled to an amplifier.

12. A circuit to provide improved echo response, comprising:

a first resistor coupled between a first node and a second node, wherein the first resistor is directly connected into the circuit;

a second resistor directly connected into the circuit and coupled between the second node and a third node;

a first transformer having a secondary winding coupled to a third resistor, and a primary winding coupled between the third node and a fourth node, wherein the third resistor is not directly connected into the circuit; and

a second transformer having a secondary winding and a primary winding, the primary winding of the secondary transformer coupled between the first and fourth nodes,

wherein the circuit is coupled to a low pass filter through a third transformer, the third transformer being a high frequency transformer.

13. The circuit of claim 12 , wherein the first transformer and the second transformer are high frequency transformers for coupling frequencies in a gigahertz (GHz) range.

14. The circuit of claim 12 , wherein a twisted pair input is coupled to the circuit through the second transformer.

15. The circuit of claim 12 , wherein the first transformer is coupled to the third resistor such that the third resistor is not directly connected into the circuit.

Assignments (10)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERROR IN RECORDING THE MERGER IN THE INCORRECT US PATENT NO. 8,876,094 PREVIOUSLY RECORDED ON REEL 047351 FRAME 0384. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 8, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 049248/0558 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF THE MERGER PREVIOUSLY RECORDED AT REEL: 047230 FRAME: 0910. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047351/0384 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047230/0910 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 16, 2015
From: NETLOGIC I LLC
To: BROADCOM CORPORATION
Reel/Frame 035443/0763 →
CHANGE OF NAME Recorded Apr 16, 2015
From: NETLOGIC MICROSYSTEMS, INC.
To: NETLOGIC I LLC
Reel/Frame 035443/0824 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 13, 2014
From: PLATO NETWORKS, INC.
To: NETLOGIC MICROSYSTEMS, INC.
Reel/Frame 032882/0695 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 13, 2014
From: BABANEZHAD, JOSEPH N.; HALDER, BIJIT
To: PLATO NETWORKS, INC.
Reel/Frame 032882/0679 →