Systems, circuits and methods for adapting taps of a decision feedback equalizer in a receiver

1. A method for adapting a tap of a decision feedback equalizer in a receiver, comprising:

receiving a plurality of data decisions and a plurality of error decisions, wherein the data decisions are generated from data slicers that determine if an output of a summer is a logical 1 or a logical 0, wherein the error decisions are generated from error slicers that compare the output of the summer with a target signal eye opening level;

deriving the number of margin hits that occur by using the data decisions and the error decisions, a margin hit occurring when one of the data decisions differs from one of the error decisions;

calculating a balance value from the plurality of data decisions and the plurality of error decisions, wherein the balance value is a sum of products; and

updating the tap of the decision feedback equalizer by using the balance value, the updating of the tap continuing until the number of margin hits is minimized.

2. The method of claim 1 , wherein the comparison of the output of the summer with a target signal eye opening level further comprises a comparison of the amplitude of the output of the summer with the amplitude of the target signal eye opening level.

3. The method of claim 2 , wherein a margin hit occurs when the amplitude of a signal eye of an output of a summer within the decision feedback equalizer is less than the amplitude of a target signal eye opening.

4. The method of claim 1 , wherein the data slicers and error slicers are components of the decision feedback equalizer.

5. The method of claim 1 , further comprising parallelizing the data decisions and the error decisions into groups of a plurality of bits.

6. The method of claim 1 , wherein the updating of the tap is performed by a microcontroller.

7. The method of claim 1 , wherein the updating of the tap further comprises using a steepest descent algorithm that uses a gradient function to determine the direction of the tap of the decision feedback equalizer which decreases the number of margin hits most rapidly.

8. A system for adapting component parameters in a receiver, comprising:

a decision feedback equalizer comprising a tap, and configured to:

generate a plurality of data decisions and a plurality of error decisions, wherein the data decisions are generated from data slicers that determine if an output of a summer is a logical 1 or a logical 0, wherein the error decisions are generated from error slicers that compare the output of the summer with a target signal eye opening level;

a logic module, for:

derive the number of margin hits that occur by using the data decisions and the error decisions, a margin hit occurring when one of the data decisions differs from one of the error decisions;

calculate a balance value from the data decisions and the error decisions,

wherein the balance value is a sum of products; and

update the tap of the decision feedback equalizer by using the balance value, the updating of the tap continuing until the number of margin hits is minimized.

9. The system of claim 8 , wherein the comparison of the output of the summer with a target signal eye opening level further comprises a comparison of the amplitude of the output of the summer with the amplitude of the target signal eye opening level.

10. The system of claim 8 , wherein a margin hit occurs when the amplitude of a signal eye of an output of a summer within the decision feedback equalizer is less than the amplitude of a target signal eye opening.

11. The system of claim 8 , wherein the data slicers and error slicers are components of the decision feedback equalizer.

12. The system of claim 8 , further comprising:

a retiming module configured to:

parallelize the plurality of data decisions and the plurality of error decisions into groups of a plurality of bits.

13. The system of claim 8 , wherein the logic module comprises a microcontroller.

14. The system of claim 8 , wherein the updating of the tap further comprises a steepest descent algorithm that uses a gradient function to determine the direction of the tap of the decision feedback equalizer which decreases the number of margin hits most rapidly.

15. A method for adapting a plurality of taps of a decision feedback equalizer in a receiver, comprising:

receiving a plurality of data decisions and a plurality of error decisions, wherein the data decisions are generated from data slicers that decide if an output of a summer is a logical 1 or a logical 0, wherein the error decisions are generated from error slicers that compare the output of the summer with a target signal eye opening level;

deriving the number of margin hits that occur by using the data decisions and the error decisions, a margin hit occurring when one of the data decisions differs from one of the error decisions;

calculating a plurality of balance values from the data decisions and the error decisions, wherein the balance value is a sum of products; and

updating the taps of the decision feedback equalizer by using the balance values, the updating of each of the taps continuing until the number of margin hits is minimized through the use of a steepest descent algorithm for each of the taps.

16. The method of claim 15 , wherein using the steepest descent algorithm comprises using a gradient function to determine the direction of each tap of the decision feedback equalizer which decreases the number of margin hits most rapidly.

17. The method of claim 15 , wherein the steepest descent algorithm is performed by a microcontroller.

18. The method of claim 15 , further comprising adjusting, by a clock delay, a point where the error slicer compares the output of the summer to the target signal eye.

19. The method of claim 18 , wherein the clock delay is controlled by a digitally controlled delay line.

20. The method of claim 15 , wherein the target signal eye is digitally controlled.